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Channel-Based Behavioral Test Synthesis for Improved Module Reachability (1999)
| Content Provider | CiteSeerX |
|---|---|
| Abstract | We introduce a novel behavioral test synthesis methodology that attempts to increase module reachability, driven by powerful global design path analysis. Based on the notion of transparency channels, test justification and propagation bottlenecks are revealed for each module in the design. Subsequently, the proposed behavioral test synthesis scheme eliminates, during scheduling, allocation and binding, as many reachability bottlenecks, as possible. Furthermore, it identifies the control states and provides the templates required for translating each module's test into global design test. We demonstrate our scheme on a representative example, unveiling the potential of path analysis based techniques to accurately identify and eliminate module reachability bottlenecks, thus guiding behavioral test synthesis. 1. Introduction High-level synthesis [3] has become an inseparable part of modern circuit design, providing an automated mechanism of exploring hardware implementation alternative... |
| File Format | |
| Publisher Date | 1999-01-01 |
| Access Restriction | Open |
| Subject Keyword | Module Reachability Bottleneck Global Design Test Behavioral Test Synthesis Automated Mechanism Inseparable Part Module Reachability Powerful Global Design Path Analysis Path Analysis Introduction High-level Synthesis Hardware Implementation Alternative Many Reachability Bottleneck Channel-based Behavioral Test Synthesis Novel Behavioral Test Synthesis Methodology Transparency Channel Control State Test Justification Modern Circuit Design Behavioral Test Synthesis Scheme Eliminates Improved Module Reachability Representative Example Propagation Bottleneck |
| Content Type | Text |