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Analysis of worst-case delay bounds for on-chip packetswitching networks (2010)
| Content Provider | CiteSeerX |
|---|---|
| Author | Qian, Yue Lu, Zhonghai Dou, Wenhua |
| Abstract | Abstract—In network-on-chip (NoC), computing worst-case delay bounds for packet delivery is crucial for designing predictable systems but yet an intractable problem. This paper presents an analysis technique to derive per-flow communication delay bound. Based on a network contention model, this technique, which is topology independent, employs network calculus to first compute the equivalent service curve for an individual flow and then calculate its packet delay bound. To exemplify this method, this paper also presents the derivation of a closedform formula to compute a flow’s delay bound under all-to-one gather communication. Experimental results demonstrate that the theoretical bounds are correct and tight. Index Terms—Delay bound, network calculus, network-onchip, performance analysis, quality-of-service. I. |
| File Format | |
| Journal | IEEE Trans. Comput.-Aided Design Integr. Circuits Syst |
| Language | English |
| Publisher Date | 2010-01-01 |
| Access Restriction | Open |
| Subject Keyword | Worst-case Delay Bound On-chip Packetswitching Network Network Calculus Predictable System Index Term Delay Bound Closedform Formula Individual Flow Flow Delay Bound Packet Delay Bound Packet Delivery Equivalent Service Curve Analysis Technique Intractable Problem Performance Analysis Per-flow Communication Delay Bound All-to-one Gather Communication Experimental Result Theoretical Bound Network Contention Model |
| Content Type | Text |
| Resource Type | Article |