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Frequency domain hybrid–arq chase combining for broadband mimo cdma systems (904).
| Content Provider | CiteSeerX |
|---|---|
| Author | Chafnaji, Houda Ait-Idir, Tarik Saoudi, Samir Vasilakos, Athanasios V. |
| Abstract | In this paper, we consider high-speed wireless packet access using code division multiple access (CDMA) and multiple-input–multiple-output (MIMO). Current wireless standards, such as high speed packet access (HSPA), have adopted multi-code transmission and hybrid–automatic repeat request (ARQ) as major technologies for delivering high data rates. The key technique in hybrid–ARQ, is that erroneous data packets are kept in the receiver to detect/decode retransmitted ones. This strategy is refereed to as packet combining. In CDMA MIMO-based wireless packet access, multi-code transmission suffers from severe performance degradation due to the loss of code orthogonality caused by both interchip interference (ICI) and co-antenna interference (CAI). This limitation results in large transmission delays when an ARQ mechanism is used in the link layer. In this paper, we investigate efficient minimum mean square error (MMSE) frequency domain equalization (FDE)-based iterative (turbo) packet combining for cyclic prefix (CP)-CDMA MIMO with Chase-type ARQ. We introduce two turbo packet combining schemes: i) In the first scheme, namely “chip-level turbo packet combining”, MMSE FDE and packet combining are jointly performed at the chiplevel. ii) In the second scheme, namely “symbol-level turbo packet combining”, chip-level MMSE FDE and despreading are separately carried out for each transmission, then packet combining is performed at the level |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Broadband Mimo Cdma System Packet Combining Chip-level Turbo Packet Combining Cdma Mimo-based Wireless Packet Access High Data Rate Hybrid Automatic Repeat Request Major Technology Co-antenna Interference Mmse Fde Key Technique Severe Performance Degradation Cyclic Prefix Arq Mechanism Large Transmission Delay Symbol-level Turbo Packet Combining Chase-type Arq Multi-code Transmission Suffers Erroneous Data Packet Limitation Result Cdma Mimo Multiple-input Multiple-output Chip-level Mmse Fde Turbo Packet Second Scheme High-speed Wireless Packet Access First Scheme Code Orthogonality High Speed Packet Access Interchip Interference Efficient Minimum Mean Square Error Frequency Domain Equalization Hybrid Arq Current Wireless Standard Link Layer Multi-code Transmission Code Division Multiple Access |
| Content Type | Text |
