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Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits (1997)
| Content Provider | CiteSeerX |
|---|---|
| Author | Roig, Oriol Cortadella, Jordi Peña, Marco A. Pastor, Enric |
| Description | In Proceedings of the 34th Design Automation Conference This paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exercised by applying synchronous test vectors, as is done by real-life testers. The main contribution of the paper is the abstraction of the circuit's behavior as a synchronous finite state machine in such a way that similar techniques to those currently used for synchronous circuits can be safely applied for testing. Currently, the fault model being used is the input stuck-at model. Experimental results on different benchmarks show that our approach generates test vectors with high fault coverage. |
| File Format | |
| Language | English |
| Publisher Date | 1997-01-01 |
| Access Restriction | Open |
| Subject Keyword | Main Contribution Test Vector Different Benchmark Novel Approach Synchronous Test Vector Input Stuck-at Model Similar Technique Automatic Generation Purpose Assume Fault Model Automatic Test Pattern Generation Synchronous Test Pattern High Fault Coverage Synchronous Circuit Asynchronous Circuit Real-life Tester Experimental Result Synchronous Finite State Machine |
| Content Type | Text |
| Resource Type | Article |
