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Conservation cores: reducing the energy of mature computations (2010)
| Content Provider | CiteSeerX |
|---|---|
| Author | Venkatesh, Ganesh Sampson, Jack Goulding, Nathan Garcia, Saturnino Bryksin, Vladyslav Lugo-Martinez, Jose Swanson, Steven Taylor, Michael Bedford |
| Description | In ASPLOS Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip that can run at full speed at one time. In this regime, specialized, energy-efficient processors can increase parallelism by reducing the per-computation power requirements and allowing more computations to execute under the same power budget. To pursue this goal, this paper introduces conservation cores. Conservation cores, or c-cores, are specialized processors that focus on reducing energy and energy-delay instead of increasing performance. This focus on energy makes c-cores an excellent match for many applications that would be poor candidates for hardware acceleration (e.g., irregular integer codes). We present a toolchain for automatically synthesizing c-cores from application source code and demonstrate that they can significantly reduce energy and energy-delay for a wide range of applications. The c-cores support patching, a form of targeted reconfigurability, that allows them to adapt to new versions of the software they target. Our results show that conservation cores can reduce energy consumption by up to 16.0 × for functions and by up to 2.1 × for whole applications, while patching can extend the useful lifetime of individual c-cores to match that of conventional processors. |
| File Format | |
| Language | English |
| Publisher Date | 2010-01-01 |
| Access Restriction | Open |
| Subject Keyword | Whole Application Specialized Processor Energy-efficient Processor Energy Consumption C-cores Support Patching Many Application Utilization Wall New Version Hardware Acceleration Voltage Scaling Power Budget Transistor Count Irregular Integer Code Conventional Processor Limited Power Budget Full Speed Application Source Code Poor Candidate Per-computation Power Requirement Wide Range Conservation Core Useful Lifetime Mature Computation Excellent Match Targeted Reconfigurability Individual C-cores |
| Content Type | Text |
| Resource Type | Article |
