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WCET-driven Cache-aware Memory Content Selection
| Content Provider | CiteSeerX |
|---|---|
| Author | Plazar, Sascha Lokuciejewski, Paul Marwedel, Peter |
| Abstract | Abstract—Caches are widely used to bridge the increasingly growing gap between processor and memory performance. They store copies of frequently used parts of the slow main memory for faster access. Static analysis techniques allow the estimation of the worstcase cache behavior and enable the computation of an upper bound of the execution time of a program. This bound is called worst-case execution time (WCET). Its knowledge is crucial to verify if hard real-time systems satisfy their timing constraints and the WCET is a key parameter for the design of embedded systems. In this paper, we propose a new WCET-driven cache-aware memory content selection algorithm, which allocates functions whose WCET highly benefits from a cached execution to cached memory areas. Vice versa, rarely used functions which do not benefit from a cached execution are allocated to noncached memory areas. As a result of this, unfavorable functions w. r. t. a program’s WCET can not evict beneficial functions from the cache. This can lead to a reduced cache miss ratio and a decreased WCET. The effectiveness of our approach is demonstrated by results achieved on real-life benchmarks. In a case study, our greedy algorithm is able to reduce the benchmarks ’ WCET by up to 20%. I. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Worst-case Execution Time Greedy Algorithm Benchmark Wcet Wcet-driven Cache-aware Memory Content Selection Vice Versa Slow Main Memory Execution Time Cached Execution Decreased Wcet Upper Bound Embedded System Key Parameter Noncached Memory Area Static Analysis Technique Case Study Unfavorable Function Memory Area Cache Miss Ratio Memory Performance Beneficial Function Abstract Cache Hard Real-time System Worstcase Cache Behavior Real-life Benchmark Timing Constraint Program Wcet |
| Content Type | Text |
