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Substrate current in n-channel and p-channel mosfets between 77k and 300k: characterization and simulation.
| Content Provider | CiteSeerX |
|---|---|
| Abstract | Silicon is the material of choice for fabrication of high circuit density, low defect density and high speed integrated devices. CMOS technology provides the additional advantage of low power dissipation. Performance enhancement can be obtained by operating CMOS circuits at liquid nitrogen temperatures 111. However, low temperature operation exacerbates the generation of substrate current by impact ionization, leading to potential device degradation 121. This work characterizes the temperature behavior of the substrate current, and presents a model describing this behavior based on Shockley’s lucky electron (LE) model [3]. For N-channel (Pchannel) devices, the model is extended using a Maxwell-Boltzmann (MB) distribution of hot electron (hole) energies above (below) the conduction (valence) band minimum (maximum). We implement the model in the 2-D device simulator CADDET 141. The agreement between data and simulations enhances physical understanding of substrate current in MOSFETs, and warrants confident design of a CMOS technology for cryogenic operation. |
| File Format | |
| Access Restriction | Open |
| Subject Keyword | Low Power Dissipation Low Defect Density Additional Advantage Cmos Circuit Warrant Confident Design Impact Ionization High Circuit Density Liquid Nitrogen Temperature Low Temperature Operation Shockley Lucky Electron High Speed Band Minimum Performance Enhancement Cmos Technology Cryogenic Operation Potential Device Degradation Temperature Behavior Simulation Enhances Physical Understanding 2-d Device Simulator Caddet Substrate Current N-channel P-channel Mosfets Hot Electron |
| Content Type | Text |
