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Regularization of hierarchical vhdl-ams models using bipartite graphs (2002).
| Content Provider | CiteSeerX |
|---|---|
| Author | Maedes, Jochen Glesner, Manfred |
| Abstract | The powerful capability of VHDL-AMS to describe complex continuous systems in form of differential algebraic equations (DAEs) often leads to problems during numerical simulation. This paper presents a discrete algorithm to analyze unsolvable DAE systems and to correct the underlying hierarchical VHDL-AMS description automatically in interaction with the designer, avoiding timeconsuming manual error correction. |
| File Format | |
| Publisher Date | 2002-01-01 |
| Access Restriction | Open |
| Subject Keyword | Discrete Algorithm Differential Algebraic Equation Numerical Simulation Manual Error Correction Hierarchical Vhdl-ams Model Underlying Hierarchical Vhdl-ams Description Bipartite Graph Powerful Capability Complex Continuous System Unsolvable Dae System |
| Content Type | Text |
| Resource Type | Article |
