Loading...
Please wait, while we are loading the content...
Similar Documents
A Parallel Rendering Algorithm for MIMD Architectures (1991)
| Content Provider | CiteSeerX |
|---|---|
| Author | Crockett, Thomas W. Orloff, Tobias |
| Description | Applications such as animation and scientific visualization demand high performance ren-dering of complex three dimensional scenes. To deliver the necessary rendering rates, highly parallel hardware architectures are required. The challenge is then to design algorithms and software which effectively use the hardware parallelism. This paper describes a rendering al-gorithm targeted to distributed memory MIMD architectures. For maximum performance, the algorithm exploits both object-level and pixel-level parallelism. The behavior of the algorithm is examined both analytically and experimentally. Its performance for large numbers of processors is found to be limited primarily by communication overheads. An experimental implementation for the Intel iPSC/860 shows increasing performance from 1 to 128 processors across a wide range of scene complexities. It is shown that minimal modifications to the algorithm will adapt it for use on shared memory architectures as well. |
| File Format | |
| Journal | ICASE, NASA Langley Research |
| Language | English |
| Publisher Date | 1991-01-01 |
| Access Restriction | Open |
| Subject Keyword | Hardware Parallelism Scene Complexity Minimal Modification Intel Ipsc Parallel Hardware Architecture Communication Overhead Dimensional Scene Experimental Implementation Distributed Memory Mimd Wide Range Parallel Rendering Algorithm Mimd Architecture Large Number Shared Memory Architecture Necessary Rendering Rate Maximum Performance Pixel-level Parallelism |
| Content Type | Text |
| Resource Type | Article |
