NDLI: VeriFlow: verifying network-wide invariants in real time

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VeriFlow: verifying network-wide invariants in real time

Content Provider	ACM Digital Library
Author	Khurshid, Ahmed Godfrey, P. Brighten Caesar, Matthew Zhou, Wenxuan
Abstract	Networks are complex and prone to bugs. Existing tools that check configuration files and data-plane state operate offline at timescales of seconds to hours, and cannot detect or prevent bugs as they arise. Is it possible to check network-wide invariants in real time, as the network state evolves? The key challenge here is to achieve extremely low latency during the checks so that network performance is not affected. In this paper, we present a preliminary design, VeriFlow, which suggests that this goal is achievable. VeriFlow is a layer between a software-defined networking controller and network devices that checks for network-wide invariant violations dynamically as each forwarding rule is inserted. Based on an implementation using a Mininet OpenFlow network and Route Views trace data, we find that VeriFlow can perform rigorous checking within hundreds of microseconds per rule insertion.
Starting Page	49
Ending Page	54
Page Count	6
File Format	PDF MP4
ISBN	9781450314770
DOI	10.1145/2342441.2342452
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2012-08-13
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Software-defined networking Forwarding Openflow Debugging Real time
Content Type	Audio Text
Resource Type	Article

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