NDLI: Multi-project reticle floorplanning and wafer dicing

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Multi-project reticle floorplanning and wafer dicing

Content Provider	ACM Digital Library
Author	Wang, Qinke Zelikovsky, Alex Z. Xu, Xu Kahng, Andrew B. Mǎndoiu, Ion
Abstract	Multi-project Wafers (MPW) are an efficient way to share the rising costs of mask tooling between multiple prototype and low production volume designs. Packing the different die images on a multi-project reticle leads to new and highly challenging floorplanning formulations, characterized by unusual constraints and complex objective functions. In this paper we study multi-project reticle floorplanning and wafer dicing problems under the prevalent side-to-side wafer dicing technology. Our contributions include practical mathematical programming algorithms and efficient heuristics based on interval-graph coloring which find side-to-side wafer dicing plans with maximum yield for a fixed multi-project reticle floorplan and given per-die maximum dicing margins. We also give novel shelf packing and simulated annealing reticle floorplanning algorithms for maximizing wafer-dicing yield. Experimental results show that our algorithms improve wafer-dicing yield significantly compared to existing industry tools and academic min-area floorplanners.
Starting Page	70
Ending Page	77
Page Count	8
File Format	PDF
ISBN	1581138172
DOI	10.1145/981066.981082
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2004-04-18
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Multi-project wafers Wafer dicing Reticle design
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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