NDLI: Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils

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Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils

Content Provider	ACM Digital Library
Author	Djidjev, Hristo Grosser, Tobias Rajopadhye, Sanjay Prajapati, Nirmal Ranasinghe, Waruna Andonov, Rumen
Abstract	Stencil computations are an important class of compute and data intensive programs that occur widely in scientific and engineeringapplications. A number of tools use sophisticated tiling, parallelization, and memory mapping strategies, and generate code that relies on vendor-supplied compilers. This code has a number of parameters, such as tile sizes, that are then tuned via empirical exploration. We develop a model that guides such a choice. Our model is a simple set of analytical functions that predict the execution time of the generated code. It is deliberately optimistic, since tile sizes and, moreover, the optimistic assumptions are intended to enable we are targeting modeling and parameter selections yielding highly tuned codes. We experimentally validate the model on a number of 2D and 3D stencil codes, and show that the root mean square error in the execution time is less than 10% for the subset of the codes that achieve performance within 20% of the best. Furthermore, based on using our model, we are able to predict tile sizes that achieve a further improvement of 9% on average.
Starting Page	163
Ending Page	177
Page Count	15
File Format	PDF
ISBN	9781450344937
DOI	10.1145/3018743.3018744
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2017-01-26
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Polyhedral method Analytical models Hybrid hexagonal classic tiling Performance prediction Stencils Gpgpu
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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