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A layout for sparse cube-connected-cycles network

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A layout for sparse cube-connected-cycles network

Content Provider	ACM Digital Library
Author	Penttonen, Martti Leppänen, Ville Forsell, Martti
Abstract	In the Network-On-Chip context, a number of computational units are connected to each other via a network. The computational units act as sources and sinks of messages that the units send to each other to implement some distributed computational functionality. When the units need to intensively send messages to each other, ordinary dense interconnection networks will not have enough bandwidth to transfer the messages at the same pace as those are produced by the computational units. We consider a sparse cube-connected-cycles network as a candidate for NOCs. Such a sparse network will have enough bandwidth to support high-throughput computing in the NOCs context. We show a grid-like layout for the sparse cube-connected-cycles network and give properties of such a layout. We compare the layout properties to previously reported properties of layouts for sparse mesh-based networks. Although the logical diameter of the sparse cube-connected-cycles network is favorable, its other properties are found to be rather poor.
Starting Page	32
Ending Page	37
Page Count	6
File Format	PDF
ISBN	9781450309172
DOI	10.1145/2023607.2023614
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2011-06-16
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Cube-connected-cycles Layout Network on chip Sparse networks
Content Type	Text
Resource Type	Article

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