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| Content Provider | ACM Digital Library |
|---|---|
| Author | Huang, Tao Zhong, Qi Guan, Xuetao Cheng, Xu Wang, Keyi |
| Abstract | It is well recognized that moving I/O data in/out memory has become critical for high bandwidth devices. Specifically, the embedded system, with limited cache size and simple architecture, consumes a large amount of CPU cycles for off-chip memory access. The work presented in this paper addresses this problem through an Affinity-aware DMA Buffer management strategy, called ADB, requiring no change to underlying hardware. We introduce the concept of buffer affinity describes the data location of the recently released DMA buffer in the memory hierarchy. The more data in cache, the higher affinity the buffer has. Based on the character of the embedded system, we can identify buffer affinity at runtime. Using this online profiling, ADB allocates buffer with different affinity. For output processes, ADB allocates the high affinity buffer to reduce off-chip memory access when OS copies data from the user buffer to the kernel buffer. For input processes, ADB allocates the low affinity buffer to skip part of cache invalidation operations for maintaining I/O coherence. Measurements show that ADB, implemented in the Linux-2.6.32 kernel and running on a 1GHz UniCore-2 processor, improves the performance of network related programs from 5.2% to 8.8%. |
| Starting Page | 1588 |
| Ending Page | 1593 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781450308571 |
| DOI | 10.1145/2245276.2232031 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2012-03-26 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Cache pollution Dma buffer management Affinity-aware Input/output Reduce off-chip memory access |
| Content Type | Text |
| Resource Type | Article |
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