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  1. Proceedings of the second international workshop on Performance modeling, benchmarking and simulation of high performance computing systems (PMBS '11)
  2. Execution-less performance modeling
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Evaluating interconnect and virtualization performance for high performance computing
BlackjackBench: portable hardware characterization
A preliminary evaluation of the hardware acceleration of the cray gemini interconnect for PGAS languages and comparison with MPI
Critical path-based thread placement for NUMA systems
Predictive modeling and analysis of OP2 on distributed memory GPU clusters
Towards autotuning by alternating communication methods
Auto-generation of communication benchmark traces
Benchmarking and modeling disk-based storage tiers for practical storage design
Optimizing matrix transposes using a POWER7 cache model and explicit prefetching
Execution-less performance modeling
A method for automatically generating analogue benchmark suites using micro architectural event counters
Towards efficient GPU sharing on multicore processors
Memory access cycle and the measurement of memory systems

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Execution-less performance modeling

Content Provider ACM Digital Library
Author Iakymchuk, Roman Bientinesi, Paolo
Abstract We aim at modeling the performance of linear algebra algorithms without executing either the algorithms or any parts of them. The performance of an algorithm can be expressed in terms of the time spent on CPU execution and memory-stalls. The main concern of the study is to build analytical models to accurately predict memory-stalls. We construct an analytical formula for modeling cache misses of fundamental linear algebra operations such as those included in the Basic Linear Algebra Subprograms (BLAS) library. The number of cache misses occurring in higher-level algorithms--like a matrix factorization--is then predicted by combining the models for the appropriate BLAS subroutines. As case studies, we consider the LU factorization and GER--a BLAS operation and a building block for the LU factorization. We validate the models on both Intel and AMD processors, attaining remarkably accurate performance predictions.
Starting Page 11
Ending Page 12
Page Count 2
File Format PDF
ISBN 9781450311021
DOI 10.1145/2088457.2088465
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2011-11-13
Publisher Place New York
Access Restriction Subscribed
Subject Keyword Performance prediction Memory-stalls Performance model Cache misses
Content Type Text
Resource Type Article
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