NDLI: Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems

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Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems

Content Provider	ACM Digital Library
Author	Tala, Mahdi Miorandi, Gabriele Ramini, Luca Balboni, Marco Bertozzi, Davide
Abstract	Networks-on-chip (NoCs) are today at the core of multi- and many-core systems, acting as the system-level integration framework. In order to support scaling to future device generations, NoCs will struggle to deliver the required communication performance within tight power budgets. In this respect, evolutionary as well as revolutionary interconnect technologies are currently being considered. On one hand, clockless handshaking materializes GALS systems that completely remove the system clock while reducing idle power to only the leakage power. On the other hand, the technology platform could be changed, by replacing electrical wires with optical links and networks. This paper provides a comprehensive power analysis of the two technologies under test on a path-by-path basis, by comparing them with each other and with a baseline synchronous NoC. The outcome of this paper can support the selection of interconnect solutions for future manycore systems where power is the primary concern, as well as the runtime selection policy of routing paths in the context of hybrid interconnect fabrics.
Starting Page	1
Ending Page	6
Page Count	6
File Format	PDF
ISBN	9781450340847
DOI	10.1145/2857058.2857063
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2016-01-18
Publisher Place	New York
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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