NDLI: Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis (CODES+ISSS '03)

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Virtual synchronization technique with OS modeling for fast and time-accurate cosimulation

Transaction level modeling: an overview

Synthesizing operating system based device drivers in embedded systems

Design space exploration of a hardware-software co-designed $GF(2^{m})$ galois field processor for forward error correction and cryptography

Industry best practices in embedded software

Architectural versus physical solutions for on-chip communication challenges

Design optimization of mixed time/event-triggered distributed embedded systems

A low-cost and low-power multi-standard video encoder

Synthesis of real-time embedded software with local and global deadlines

VL-CDRAM: variable line sized cached DRAMs

SEAS: a system for early analysis of SoCs

Verification of design decisions in ForSyDe

Schedule-aware performance estimation of communication architecture for efficient design space exploration

Tracking object life cycle for leakage energy optimization

A modular simulation framework for architectural exploration of on-chip interconnection networks

Extending the SystemC synthesis subset by object-oriented features

Hardware support for real-time operating systems

A fast parallel reed-solomon decoder on a reconfigurable architecture

On-chip communication design: roadblocks and avenues

Deriving process networks from weakly dynamic applications in system-level design

A case study of mapping a software-defined radio (SDR) application on a reconfigurable DSP core

Pareto-optimization-based run-time task scheduling for embedded systems

A low-cost memory architecture with NAND XIP for mobile embedded systems

Programmers' views of SoCs

A multiobjective optimization model for exploring multiprocessor mappings of process networks

Accurate estimation of cache-related preemption delay

Compiler parallelization of C programs for multi-core DSPs with multiple address spaces

An efficient retargetable framework for instruction-set simulation

RTOS scheduling in transaction level models

Programming embedded networked sensor systems

The analysis and design of architecture systems for speech recognition on modern handheld-computing devices

Architecture and synthesis for multi-cycle on-chip communication

A codesigned on-chip logic minimizer

A low power scheduler using game theory

Design space minimization with timing and code size optimization for embedded DSP

Security wrappers and power analysis for SoC technologies

A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip

Early estimation of the size of VHDL projects

Architectural analysis and instruction-set optimization for design of network protocol processors

System-level design tools: who needs them, who has them, and how much should they cost?

First results with eBlocks: embedded systems building blocks

Design technology challenges for system and chip level designs in very deep submicron technologies

The future of system-level design: can we find the right solutions to the right problems at the right time?

Driving forces behind SOC development

Driving agenda for systems research

Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis (CODES+ISSS '03)

Content Provider	ACM Digital Library
Editor	Jacome, Margarida Lavagno, Luciano Lin, Kwei-Jay Chou, Pai H. Paulin, Pierre Walker, Bob Najjar, Walid Wolf, Wayne Parker, Alice Nakamura, Yukihiro Kurdahi, Fadi Marculescu, Radu Orailoglu, Alex Karim, Faraydon Ernst, Rolf Hsieh, Harry Wakabayashi, Kazutoshi Rosenstiel, Wolfgang Yasuura, Hiroto Abdoulhamid, Mostapha Gupta, Rajesh Miranda, Miguel
Copyright Year	2003
Abstract	After over a year of preparation and hard work on the part ofthe organizing committee and the program committee, it is our greatpleasure to introduce you the technical program of the FirstInternational IEEE/ACM/IFIP Conference on Hardware/SoftwareCo-design and System Synthesis. This conference represents theunification of the erstwhile CODES and ISSS communities. Both theInternational Symposium on Hardware/Software Codesign (CODES) andthe International Symposium on System Synthesis (ISSS) have beenactive forums with over a decade of continuous communityparticipation and technical community building in all aspects ofembedded systems hardware and software. During this period, thecommunity also saw the emergence of a number of new forumsexamining specific related areas: from compilers/architectures(CASES), software (EMSOFT) to validation and testing (HLDVT). Theseforums are a living testament to a growing thriving community inembedded systems.Being the oldest forums, CODES and ISSS represented the greatestmomentum as reflected by the number of submissions and attendeeparticipation. There was also a great sense of camaraderie betweenthe two communities: over one-third of technical program committeemembers in one forum could also be found in the other one. As anacknowledgment of this relationship between the two forums, westarted an email discussion in May 2002 on the possibility ofco-locating the two events. What followed the initial email was atorrential discussion on various possibilities including the mergerof two events into creating the primary event in embedded systemsdesign. This discussion led to a thorough examination of theeffectiveness of each of the two forums and the possibility ofleveraging these into creating a single forum that would reflectthe best and brightest of the technical advances in the broad areasof embedded systems and system-level design. This forum - it wasenvisioned - would provide the greatest meeting point for industryand academia looking to make a direct impact on the industrypractice in system design. Following open meetings at DAC and ISSSin 2002, we converged on the guidelines and organizing committeefor the new forum. A "transition committee" of the CODES and ISSSvolunteers was set up to guide the merger process and the formationof the new community. Two separate polls were conducted to gatherdetailed community feedback on substantive issues, such as thescope of the meeting, the structure of the meeting and, of course,the naming for the new event. We reached consensus on almost allitems, though we decided to postpone the invention of a new namefor the meeting in favor of the more straightforwardCODES+ISSS.As you attend the conference program and read through theseproceedings, we are confident that one thing would be abundantlyclear: the new combined event is much greater than the sum of theparts. This is reflected in many ways from the breadth of theprogram, and the depth of presentations to the diversity of theconference attendees and its sponsors. The CODES+ISSS call forpapers received 143 full submissions. The TPC led by TPC Co-Chairs,Alex Orailoglu and Pai Chou, organized the massive review processwhere on an average each paper received 5 substantial reviews (onan average 3-4 pages of reviews for each paper). Each of thesubmitted papers went through a close scrutiny of the reviewsreceived and the overall reviewer opinion. A subset of the papers -composed of the papers that were evaluated to be marginal and/orexhibiting excessive divergence in reviewer opinions - was selectedfor a newly introduced rebuttal process. The authors were invitedto read the reviews and respond to specific questions prior to theprogram committee meeting. An ad hoc subcommittee with programcommittee members outside the original reviewers subsequentlyexamined the reviews and the rebuttal to make a recommendation tothe whole Program Committee for each such paper. Following amarathon 11-hour TPC meeting in early June 2003, held under thestrictest code of conduct on conflict of interest rules, thecommittee identified, based on the perceived strength of thetechnical contribution, 30 regular papers. Four more papers thatwere perceived to be highly innovative were additionally selectedfor presentation in an "innovative work-in-progress" session. Weare convinced that the collection of papers selected representssubstantial advances in theory or in practice in the area ofembedded systems, and hope that you would agree with ourassessment.The CODES+ISSS conference this year also features a workshop,named ESTIMedia or the First Workshop on Embedded Systems forReal-Time Multimedia. This workshop is a result of our efforts toenhance the academia-industry participation by providingopportunities for discussions on specific application areas. TheESTIMedia workshop will provide a venue for bringing togetherexperts in multimedia systems design, theory and practice. Underthe leadership of ESTIMedia general chair, Hiroto Yasuura andtechnical program chairs Gerhard Fohler and Radu Marculescu, theresponse to ESTIMedia call for papers has been tremendous. Thisfirst workshop received 38 submissions, many of very high quality.This is clearly a testament to the importance of this emergingtopic area. We thank Petru Eles for driving the process of workshopselection and its organization. We hope to welcome additionalworkshops and synergistic events like ESTIMedia, in the future.
ISBN	1581137427
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2003-10-01
Access Restriction	Subscribed
Content Type	Text
Resource Type	Conference Proceedings

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