NDLI: Keynote Talk III: A formal methods perspective on product line engineering

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Keynote talk I: Syntax-guided synthesis

Local and global fairness in concurrent systems

SCEst: Sequentially constructive esterel

Design and verification of multi-rate distributed systems

Optimized distributed implementation of timed component-based systems

Towards refinement types for time-dependent data-flow networks

C-to-Verilog translation validation

MEMOCODE 2015 design contest: Continuous skyline computation

Efficient implementation of continuous skyline computation on a multi-core processor

Efficient continuous skyline computation on multi-core processors based on Manhattan distance

Keynote talk II: Accelerating data centers using reconfigurable logic

Modeling and verifying context-aware non-monotonic reasoning agents

Metric interval temporal logic specification elicitation and debugging

Formal validation and verification of a medical software critical component

Hierarchical multi-formalism proofs of cyber-physical systems

Modeling resource sharing using FSM-SADF

Logic analysis and optimization with quick identification of invariants through one time frame analysis

Layering RTL, SAFL, Handel-C and Bluespec constructs on Chisel HCL

Compositional design of asynchronous circuits from behavioural concepts

A generic synthesisable test bench

Passive testing of production systems based on model inference

Model and program repair via SAT solving

On the deployment problem of embedded systems

Keynote Talk III: A formal methods perspective on product line engineering

Reducing power with activity trigger analysis

Implementing latency-insensitive dataflow blocks

Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays

Process algebra semantics & reachability analysis for micro-architectural models of communication fabrics

Automatic and configurable instrumentation of C programs with temporal assertion checkers

From signal temporal logic to FPGA monitors

From non-zenoness verification to termination

Verification condition generation for hybrid systems

Towards verification of hybrid systems in a foundational proof assistant

Keynote Talk III: A formal methods perspective on product line engineering

Content Provider	ACM Digital Library
Abstract	Summary form only given. A product line is a family of similar products with variations in features and functions. Product Line Engineering (PLE) is an engineering discipline for product lines using a shared set of engineering assets, a managed set of features, and an efficient means of production. It takes advantage of the commonality shared across the family while efficiently and systematically managing the variation among the products. PLE can trace its roots in software back to the 1970s; its roots in manufacturing go back centuries. But only the relatively recent (2000s or so) advent of industrial-strength automation and methodology has enabled Systems and Software PLE to emerge as a reliably repeatable engineering paradigm. It is worth studying because of the phenomenal improvements in product time to market, engineering productivity, portfolio scalability, and system quality that PLE has shown, over and over, to bring to organizations that apply it. This talk explains the fundamentals of modern PLE, shares some brief case studies, and discusses how the underpinnings of formal methods and notations are enabling PLE to achieve its remarkable results.
Starting Page	168
Ending Page	168
Page Count	1
File Format	PDF
ISBN	9781509002375
DOI	10.1109/MEMCOD.2015.7340483
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-09-01
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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