NDLI: A Novel Approach to Detect Hardware Trojan Attacks on Primary Data Inputs

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A Novel Approach to Detect Hardware Trojan Attacks on Primary Data Inputs

Content Provider	ACM Digital Library
Author	Wehbe, Taimour Keezer, David C. Mooney, Vincent J. Parham, Nicholas B.
Abstract	Hardware security is an important component of any chip design intended for use by critical infrastructure or any scenario where a malicious party may want to cause trouble. A possible avenue of attack is to insert tiny Hardware Trojan (HT) logic at the primary data inputs which the attacker can trigger undetected. A detection architecture and approach is proposed where initial data generation from analog to digital values is coupled with generation of a unique signature prior to passing the data (and associated signature) for later processing. A specific situation of providing the data to a cipher chip motivates and demonstrates the approach which regenerates the signature in the cipher chip and compares against the signature input with the data; a mismatch indicates that there is a problem. The practical impact of the approach in foiling attacks by tiny HT logic can be further strengthened by the select use of reconfigurable logic for off-chip signature generation and on-chip comparison/test as the attacker can only place a small amount of HT logic and remain "tiny.".
Starting Page	1
Ending Page	10
Page Count	10
File Format	PDF
ISBN	9781450336673
DOI	10.1145/2818362.2818364
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-10-04
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Multiple-input scan register (misr) Hardware security Built-in logic block observation (bilbo) Hardware trojans
Content Type	Text
Resource Type	Article

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