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| Content Provider | ACM Digital Library |
|---|---|
| Author | Wunderlich, Hans-Joachim Elm, Melanie |
| Abstract | Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may be necessary to apply additional deterministic patterns, which cause additional hardware costs. Secondly, the BIST-signature reveals only poor diagnostic information. Recently, the first issue has been addressed successfully. The paper at hand proposes a viable, effective and cost efficient solution for the second problem. The paper presents a new method for Built-In Self-Diagnosis (BISD). The core of the method is an extreme response compaction architecture, which for the first time enables an autonomous on-chip evaluation of test responses with negligible hardware overhead. The key advantage of this architecture is that all data, which is relevant for a subsequent diagnosis, is gathered during just one test session. The BISD method comprises a hardware scheme, a test pattern generation approach and a diagnosis algorithm. Experiments conducted with industrial designs substantiate that the additional hardware overhead introduced by the BISD method is on average about 15% of the BIST area, and the same diagnostic resolution can be obtained as for external testing. |
| Starting Page | 1243 |
| Ending Page | 1248 |
| Page Count | 6 |
| File Format | |
| ISBN | 9783981080162 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2010-03-08 |
| Publisher Place | Leuven |
| Access Restriction | Subscribed |
| Subject Keyword | Diagnosis Logic bist |
| Content Type | Text |
| Resource Type | Article |
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