NDLI: Proceedings of the 2nd International Workshop on Energy Efficient Supercomputing (E2SC '14)

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HDEEM: high definition energy efficiency monitoring

Evaluating performance and power efficiency of scientific applications on multi-threaded systems

Simple power-aware scheduler to limit power consumption by HPC system within a budget

Energy-efficient stencil computations on distributed GPUs using dynamic parallelism and GPU-controlled communication

E2SC'14 Description

Trapped capacity: scheduling under a power cap to maximize machine-room throughput

Measurement and interpretation of microbenchmark and application energy use on the cray XC30

On the feasibility of dynamic power steering

Power signatures of high-performance computing workloads

Power and energy footprint of openMP programs using OpenMP runtime API

Instrumentation for accurate energy-to-solution measurements of a texas instruments TMS320C6678 digital signal processor and its DDR3 memory

Proceedings of the 2nd International Workshop on Energy Efficient Supercomputing (E2SC '14)

Content Provider	ACM Digital Library
Editor	Hoisie, Adolfy Kerbyson, Darren Lowenthal, David Nikolopoulos, Dimitrios S. Yalamanchili, Sudha Marquez, Andres Cameron, Kirk
Copyright Year	2014
Abstract	With Exascale systems on the horizon, we will be ushering in an era with power and energy consumption as the primary concerns for scalable computing. To achieve viable high performance, revolutionary methods are required with a stronger integration among hardware features, system software and applications. Equally important are the capabilities for fine-grained spatial and temporal measurement and control to facilitate energy efficient computing across all layers. Current approaches for energy efficient computing rely heavily on power efficient hardware in isolation. However, it is pivotal for hardware to expose mechanisms for energy efficiency to optimize power and energy consumption for various workloads and to reduce data motion, a major component of energy use. At the same time, high fidelity measurement techniques, typically ignored in data-center level measurement, are of high importance for scalable and energy efficient inter-play in different layers of application, system software and hardware. This workshop seeks to address the important energy efficiency aspects in the HPC community that have not been previously addressed by aspects covered in the data center or cloud computing communities. Emphasis is given to the applications view related to significant energy efficiency improvements and to the required hardware/software stack that must include necessary power and performance measurement and analysis harnesses. Current tools are often limited by hardware capabilities and their lack of information about the characteristics of a given workload/application. In the same manner, hardware techniques, like dynamic voltage frequency scaling, are often limited by their granularity (very coarse power management) or by their scope (a very limited system view). More rapid realization of energy savings will require significant increases in measurement resolution and optimization techniques. Moreover, the interplay between performance, power and reliability add another layer of complexity to this already difficult group of challenges.
Related Links	http://computer.org/proceedings/e2sc/2014/7036
ISBN	9781479970360
Language	English
Publisher	IEEE Press
Publisher Date	2014-11-16
Access Restriction	Subscribed
Content Type	Text
Resource Type	Conference Proceedings

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