NDLI: Measuring energy consumption in VLSI circuits: A foundation

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Measuring energy consumption in VLSI circuits: A foundation

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Measuring energy consumption in VLSI circuits: A foundation

Content Provider	ACM Digital Library
Author	Kissin, Gloria
Abstract	Energy conservation is a key question in today' s society and the proliferation of VLSI circuits encourages an energy conscious approach to their design. Although a single chip at current densities may consume less than one watt of power, assembling larger and larger systems with these chips results in significant energy costs [Me 80]. Moreover, energy consumed by a circuit is dissipated, typically by convection, as heat. The heat dissipated is proportional to the energy consumed. Increased densities in planar technologies and the possibility of 3-dimensional technologies, therefore, increase the need to reduce the amount of heal. produced. The intent of this paper is to lay the ground work for measuring the switching energy consumed in VLSI circuits. Intuitively, switching energy measures the area -&-ldquo;used-&-rdquo; to effect a computation. A wire or gate consumes switching energy when it changes staie from 0 to 1 or from 1 to 0. Some technologies consume more than switching energy. For example, nMOS dissipates DC power [MC 80]. CMOS, however, consumes only switching energy [MC 80]. Switching energy is thus a lower bound on total energy, and is alternately termed -&-ldquo;energy-&-rdquo; throughout this paper. In this paper, two energy models are developed, Model 1, the Uniswitch Model (USM), assumes that a wire or gate in an acyclic circuit can switch at most once. In particular, wire delays are neglected, the affects of different path lengths are neglected (ie. circuits are synchronous [Sa 76]), and all inputs are assumed to arrive together. Model 2, the Multiswitch Model (MSM), is more sensitive to timing issues that can cause wires and gates in an acyclic circuit to switch more than once. The rest of this paper is organized as follows. Section 2 defines the energy models. In section 3, a class of restricted acyclic circuits is defined. Lower and upper bounds for worst case energy are obtained for these circuits. An -&-Ohgr;(area) lower bound is obtained for acyclic monotone circuits. In section 4, average energy bounds are obtained for the restricted circuits.
Starting Page	99
Ending Page	104
Page Count	6
File Format	PDF
ISBN	0897910702
DOI	10.1145/800070.802181
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1982-05-05
Publisher Place	New York
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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