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| Content Provider | ACM Digital Library |
|---|---|
| Author | Rataj, Walter J. Davis, Alan M. |
| Abstract | GTE Laboratories is currently developing a trio of software tools which automate the feature testing of real-time systems by generating test plans directly from requirements specifications. Use of the first of these tools, the Requirements Language Processor (RLP), guarantees that the requirements are complete, consistent, non-ambiguous, and non-redundant. It generates a mode] of an extended finite-state machine which is used by the second tool, the Test Plan Generator, to generate test plans which thoroughly test the software for conformity to the requirements. These test plans are supplied to the third tool, the Automatic Test Executor, for actual testing. The RLP is the subject of this paper. The primary goal of the RLP is to provide the ability to specify the features of a target real-time system in a vocabulary familiar to an application-oriented individual and in a manner suitable for test plan generation. The RLP produces a document which can be easily understood by non-computer personnel. It is expected that this document will function as a key part of the “contract” between a real-time system supplier and a customer. This document must also serve as a springboard for the software designers during their development of the actual product. In addition to the requirements document, the RLP also produces an augmented state transition table which describes a finite state machine whose external behavior is identical to the target real-time system as defined by the specified requirements. |
| Starting Page | 61 |
| Ending Page | 66 |
| Page Count | 6 |
| File Format | |
| DOI | 10.1145/800283.811101 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 1978-01-01 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Content Type | Text |
| Resource Type | Article |
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