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| Content Provider | ACM Digital Library |
|---|---|
| Author | Peled, Doron Godefroid, Patrice Staskauskas, Mark |
| Abstract | We have developed a formal validation tool that has been used on several projects that are developing software for AT&T's $5ESS^{™}$ telephone switching system. The tool uses Holzmann's supertrace algorithm to check for errors such as deadlock and livelock in networks of communicating processes. The validator invariably finds subtle errors that were missed during thorough simulation and testing; however, the brute-force search it performs can result in extremely long running times, which can be frustrating to users. Recently, a number of researchers have been investigating techniques known as partial-order methods that can significantly reduce the running time of formal validation by avoiding redundant exploration of execution scenarios. In this paper, we describe the design of a partial-order algorithm for our validation tool and discuss its effectiveness. We show that a careful compile-time static analysis of process communication behavior yields information that can be used during validation to dramatically improve its performance. We demonstrate the effectiveness of our partial-order algorithm by presenting the results of experiments with actual industrial examples drawn from a variety of $5ESS^{™}$ application domains, including call processing, signalling, and switch maintenance. |
| Starting Page | 261 |
| Ending Page | 269 |
| Page Count | 9 |
| File Format | |
| ISBN | 0897917871 |
| DOI | 10.1145/229000.226324 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 1996-05-01 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Content Type | Text |
| Resource Type | Article |
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