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| Content Provider | ACM Digital Library |
|---|---|
| Author | Hwang, Soo Yun Park, Hyeong Jun Jhang, Kyoung Son |
| Abstract | The slave-side arbitration is different from the master-side arbitration based on the request and grant signals. The slave-side arbitration uses the response signals of slave for arbitration. Also, the arbitration overhead of the slave-side arbitration is 10% smaller than that of the master-side arbitration. In this paper, we implement and analyze the slave-side arbitration schemes for the ML-AHB busmatrix. We implemented the ML-AHB busmatrixes with fixed priority, round robin and dynamic priority arbitration schemes. Our busmatrix implementation particularly reduces area and clock period by 17% and 19% respectively, compared with those of busmatrix of ARM by virtue of the masking mechanism. With the performance simulations, we observed that when there are few masters with long job length in a bus system, the dynamic priority based arbitration shows the maximum performance and in other cases the arbitration based on round robin shows the highest performance. In addition, the arbitration scheme with transaction based multiplexing shows higher performance than the same arbitration scheme with single transfer based switching in an application with frequent accesses to the long latency devices or memories such as SDRAM. The improvements of the arbitration scheme with transaction based multiplexing are 26%, 42% and 51%, respectively when the latency times of SDRAM are 1, 2 and 3 clock cycles. |
| Starting Page | 1545 |
| Ending Page | 1551 |
| Page Count | 7 |
| File Format | |
| ISBN | 1595934804 |
| DOI | 10.1145/1244002.1244333 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2007-03-11 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Arbitration scheme Slave-side arbitration Multi-layer ahb busmatrix System on a chip On chip bus |
| Content Type | Text |
| Resource Type | Article |
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