NDLI: A near optimal scheduler for switch-memory-switch routers

Please wait, while we are loading the content...

Optimal sharing of bags of tasks in heterogeneous clusters

A practical algorithm for constructing oblivious routing schemes

Optimal fault-tolerant linear arrays

I/O-efficient topological sorting of planar DAGs

A proportionate fair scheduling rule with good worst-case performance

Performance comparison of MPI and three openMP programming styles on shared memory multiprocessors

Designing overlay multicast networks for streaming

Compact routing with name independence

Analysis of link reversal routing algorithms for mobile ad hoc networks

High throughput, parallelized 128-bit AES encryption in a resource-limited FPGA

The load rebalancing problem

Polynomial time algorithms for network information flow

Toward a decidable notion of sequential consistency

Information gathering in adversarial systems: lines and cycles

Minimizing total flow time and total completion time with immediate dispatching

A polynomial-time tree decomposition to minimize congestion

The effect of communication costs in solid-state quantum computing architectures

MST construction in O(log log n) communication rounds

Integrated prefetching and caching in single and parallel disk systems

Quantifying instruction criticality for shared memory multiprocessors

Combining online algorithms for rejection and acceptance

Tree based MPLS routing

On local algorithms for topology control and routing in ad hoc networks

MAPO: using a committee of algorithm-experts for parallel optimization of costly functions

Load balancing of unit size tokens and expansion properties of graphs

Improved approximation algorithms for the freeze-tag problem

Nonblocking k-compare-single-swap

A near optimal scheduler for switch-memory-switch routers

Online deadline scheduling: multiple machines and randomization

Online oblivious routing

VLSI layout of trees into grids of minimum width

Asynchronous parallel disk sorting

Off-line and on-line guaranteed start-up delay for media-on-demand with stream merging

Throughput-centric routing algorithm design

Worst case mobility in ad hoc networks

Buffer overflows of merging streams

Cycle stealing under immediate dispatch task assignment

Can we elect if we cannot compare?

Scheduling policies for CIOQ switches

Novel architectures for P2P applications: the continuous-discrete approach

TCP is competitive against a limited adversary

Short length menger's theorem and reliable optical routing

Randomized permutations in a coarse grained parallel environment

Relaxing the problem-size bound for out-of-core columnsort

Bicriteria approximation algorithms for scheduling problems with communications

The complexity of verifying memory coherence

Efficient galois field arithmetic on SIMD architectures

A near optimal scheduler for switch-memory-switch routers

Content Provider	ACM Digital Library
Author	Aziz, Adnan Prakash, Amit Ramachandran, Vijaya
Abstract	We present a simple and near optimal randomized parallel scheduling algorithm for scheduling packets in routers based on the Switch-Memory-Switch (SMS)architecture, which emulates 'output queuing' by using a collection of small memories within the switch to buffer packets, and which forms the basis of the fastest routers in use today. For a router with N inputs and N outputs, our algorithm computes the schedule in O(log* N) rounds, where a round is a communication of a few bits between input ports and memory together with simple local computation at the inputs and memory. Furthermore, by using an O(log* N) deep pipeline at each input, our algorithm computes the schedule in a constant number of rounds. Our pipelined algorithm is quite simple and achieves optimal (i.e.,constant) throughput with a tiny O(log* N) delay.We show that the total amount of buffer memory required by our algorithm is close to the minimum required. We also show that the number of buffer memories is within an εN additive term of 2N -- 1, for any positive constant ù>0 (and is within an additive term of o(N)for the basic scheduler), where 2N -- 1 is the minimum number of memories needed under adversarial placement of packets. Furthermore we show that the number of extra memories that we use over the minimum of N that is required in the offline version, is within a constant factor of the minimum required by any on-line scheduler, even if that scheduler is allowed to fail occasionally.Our scheduling algorithm is randomized and works with high probability in N. We also prove that it has the 'self-stabilizing' property, i.e., it resumes its normal behavior if occasional lapses occur due to the probabilistic nature of the algorithm.
Starting Page	343
Ending Page	352
Page Count	10
File Format	PDF
ISBN	1581136617
DOI	10.1145/777412.777472
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2003-06-07
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Matching Randomization Routers Schedulers Parallelism
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Randomized parallel schedulers for switch-memory-switch routers: analysis and numerical studies (2004).

A Near Optimal Scheduler for Switch-Memory-Switch Routers (2003)

Randomized parallel schedulers for switch-memory-switch routers: Analysis and numerical studies (2004)

Randomized parallel schedulers for switch-memory-switch routers: analysis and numerical studies

LaPerm: locality aware scheduler for dynamic parallelism on GPUs

FPGA implementation & comparison of current trends in memory scheduler for multimedia application

Experimental evaluation of a coarse-grained switch scheduler

1 scalable schedulers for high-performance switches.

A fully desynchronized round-robin matching scheduler for a VOQ packet switch architecture

A near optimal scheduler for switch-memory-switch routers

Similar Documents

Randomized parallel schedulers for switch-memory-switch routers: analysis and numerical studies (2004).

A Near Optimal Scheduler for Switch-Memory-Switch Routers (2003)

Randomized parallel schedulers for switch-memory-switch routers: Analysis and numerical studies (2004)

Randomized parallel schedulers for switch-memory-switch routers: analysis and numerical studies

LaPerm: locality aware scheduler for dynamic parallelism on GPUs

FPGA implementation & comparison of current trends in memory scheduler for multimedia application

Experimental evaluation of a coarse-grained switch scheduler

1 scalable schedulers for high-performance switches.

A fully desynchronized round-robin matching scheduler for a VOQ packet switch architecture

A near optimal scheduler for switch-memory-switch routers