NDLI: A theory of memory models

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A theory of memory models

Content Provider	ACM Digital Library
Author	Michael, Maged Jagadeesan, Radha Saraswat, Vijay A. von Praun, Christoph
Abstract	A memory model for a concurrent imperative programming language specifies which writes to shared variables may be seen by reads performed by other threads. We present a simple mathematical framework for relaxed memory models for programming languages. To instantiate this framework for a specific language, the designer must choose the notion of atomic steps supported by the language (e.g. 32-bit reads and writes) and specify how a composite step may be broken into a sequence of atomic steps (the decomposition rule). This rule determines which sequence of intermediate writes (if any) are visible to concurrent reads by other threads. Different choices of the rule lead to models which permit a read to return any value if there is a concurrent write (race), or models which satisfy a "No Thin Air Read"property. The former is suitable for languages such as C++(programs with races have undefined behavior), and the latter for Java. Other intermediate models are possible, useful and interesting. We establish that all models in the framework satisfy the Fundamental Property of relaxed memory models: programs whose sequentially consistent (SC) executions have no races must have have only SC executions. We show how to define synchronization constructs (such as volatiles of various kinds) in the framework, and discuss the causality test cases from the Java Memory Model.
Starting Page	161
Ending Page	172
Page Count	12
File Format	PDF
ISBN	9781595936028
DOI	10.1145/1229428.1229469
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2007-03-14
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Weak model Sequential consistency Memory model
Content Type	Text
Resource Type	Article

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