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  1. Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware (HWWS '01)
  2. The F-buffer: a rasterization-order FIFO buffer for multi-pass rendering
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High-quality pre-integrated volume rendering using hardware-accelerated pixel shading
Fast volumetric deformation on general purpose hardware
Watertight tessellation using forward differencing
Hardware support for adaptive subdivision surface rendering
Hardware support for non-photorealistic rendering
Compiling to a VLIW fragment pipeline
The F-buffer: a rasterization-order FIFO buffer for multi-pass rendering
Incremental and hierarchical Hilbert order edge equation polygon rasterizatione
R-buffer: a pointerless A-buffer hardware architecture
Quasi-linear depth buffers with variable resolution
Perlin noise pixel shaders
Vertex-based anisotropic texturing
SPAF: sub-texel precision anisotropic filtering
Real-time bump map synthesis

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Technical Report

The F-buffer: a rasterization-order FIFO buffer for multi-pass rendering

Content Provider ACM Digital Library
Author Proudfoot, Kekoa Mark, William R.
Abstract Multi-pass rendering is a common method of virtualizing graphics hardware to overcome limited resources. Most current multi-pass rendering techniques use the RGBA framebuffer to store intermediate results between each pass. This method of storing intermediate results makes it difficult to correctly render partially-transparent surfaces, and reduces the performance of shaders that need to preserve more than one intermediate result between passes. We propose an alternative approach to storing intermediate results that solves these problems. This approach stores intermediate colors (or other values) that are generated by a rendering pass in a FIFO buffer as the values exit the fragment pipeline. On a subsequent pass, the contents of the FIFO buffer are fed into the top of the fragment pipeline. We refer to this FIFO buffer as a fragment-stream buffer (or F-buffer), because this approach has the effect of associating intermediate results with particular rasterization fragments, rather than with an (x,y) location in the framebuffer. Implementing an F-buffer requires some changes to current mainstream graphics architectures, but these changes can be minor. We describe the design space associated with implementing an F-buffer, and compare the F-buffer to recirculating pipeline designs. We implement F-buffers in the Mesa software renderer, and demonstrate our programmable-shading system running on top of this renderer.
Starting Page 57
Ending Page 64
Page Count 8
File Format PDF
ISBN 158113407X
DOI 10.1145/383507.383527
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2001-08-01
Publisher Place New York
Access Restriction Subscribed
Content Type Text
Resource Type Article
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