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Content Provider | ACM Digital Library |
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Author | Chaiken, David Agarwal, Anant Kranz, David Yeung, Donald Bianchini, Ricardo Johnson, Kirk L. Kubiatowicz, John Lim, Beng-Hong Mackenzie, Kenneth |
Abstract | Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Alewife machine, a prototype implementation of the architecture, demonstrates that a parallel system can be both scalable and programmable. Four mechanisms combine to achieve these goals: software-extended coherent shared memory provides a global, linear address space; integrated message passing allows compiler and operating system designers to provide efficient communication and synchronization; support for fine-grain computation allows many processors to cooperate on small problem sizes; and latency tolerance mechanisms --- including block multithreading and prefetching --- mask unavoidable delays due to communication.Microbenchmarks, together with over a dozen complete applications running on the 32-node prototype, help to analyze the behavior of the system. Analysis shows that integrating message passing with shared memory enables a cost-efficient solution to the cache coherence problem and provides a rich set of programming primitives. Block multithreading and prefetching improve performance by up to 25% individually, and 35% together. Finally, language constructs that allow programmers to express fine-grain synchronization can improve performance by over a factor of two. |
Starting Page | 2 |
Ending Page | 13 |
Page Count | 12 |
File Format | |
ISBN | 0897916980 |
DOI | 10.1145/223982.223985 |
Language | English |
Publisher | Association for Computing Machinery (ACM) |
Publisher Date | 1995-07-01 |
Publisher Place | New York |
Access Restriction | Subscribed |
Content Type | Text |
Resource Type | Article |
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