NDLI: AASH: an asymmetry-aware scheduler for hypervisors

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AASH: an asymmetry-aware scheduler for hypervisors

Content Provider	ACM Digital Library
Author	Kamali, Ali Kazempour, Vahid Fedorova, Alexandra
Abstract	Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs were shown to be more power efficient than conventional symmetric multicore processors, and it is therefore likely that future multicore systems will include cores of different types. AMPs derive their efficiency from core specialization: instruction streams can be assigned to run on the cores best suited to their demands for architectural resources. System efficiency is improved as a result. To perform effective matching of threads to cores, the thread scheduler must be asymmetry-aware; and while asymmetry-aware schedulers for operating systems are a well studied topic, asymmetry-awareness in hypervisors has not been addressed. A hypervisor must be asymmetry-aware to enable proper functioning of asymmetry-aware guest operating systems; otherwise they will be ineffective in virtual environments. Furthermore, a hypervisor must ensure that asymmetric cores are shared among multiple guests in a fair fashion or in accordance with their priorities. This work for the first time implements simple changes to the hypervisor scheduler, required to make it asymmetry-aware, and evaluates the benefits and overheads of these asymmetry-aware mechanisms. Our evaluation was performed using an open source hypervisor Xen on a real multicore system where asymmetry was emulated via CPU frequency scaling. We compared the asymmetry-aware hypervisor to default Xen. Our results indicate that asymmetry support can be implemented with low overheads, and resulting performance improvements can be significant, reaching up to 36% in our experiments. Most performance improvements are derived from the fact that an asymmetry-aware hypervisor ensures that the fast cores do not go idle before slow cores and from the fact that it maps virtual cores to physical cores for asymmetry-aware guests according to the guest's expectations. Other benefits from asymmetry awareness are fairer sharing of computing resources among VMs and more stable execution times.
Starting Page	85
Ending Page	96
Page Count	12
File Format	PDF
ISBN	9781605589107
DOI	10.1145/1735997.1736011
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2010-03-17
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Multicore processors Heterogeneous Virtual machine monitor Scheduling algorithms Hypervisor Asymmetric
Content Type	Text
Resource Type	Article

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