NDLI: Verus: a tool for quantitative analysis of finite-state real-time systems

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Verus: a tool for quantitative analysis of finite-state real-time systems

Content Provider	ACM Digital Library
Author	Campos, S. Clarke, E. Marrero, W. Minea, M.
Abstract	Symbolic model checking is a technique for verifying finite-state concurrent systems. Models with up to $10^{30}$ states can often be verified in minutes. In this paper, we present a new tool to analyze real-time systems, based on this technique. We have designed a language, called Verus, for the description of real-time systems. Such a description is compiled into a state-transition graph and represented symbolically using binary decision diagrams. We have developed new algorithms for exploring the state space and computing quantitative information about the system. In addition to determining the exact bounds on the length of the time interval between two specified events, we compute the number of occurrences of an event in such an interval. This technique allows us to determine performance measures such as schedulability, response time, and system load. Our algorithms produce more detailed information than traditional methods. This information leads to a better understanding of the behavior of the system, in addition to verifying if its timing requirements are satisfied. We integrate these ideas into the Verus tool, currently under development. To demonstrate how our technique works, we have verified a robotics control system. The results obtained demonstrate that our method can be successfully applied in the analysis of real-time system designs.
Starting Page	70
Ending Page	78
Page Count	9
File Format	PDF
ISSN	03621340
DOI	10.1145/216636.216661
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1995-11-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Software

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