NDLI: Simulation driven insertion of data prefetching instructions for early software-on-SoC optimization

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Simulation driven insertion of data prefetching instructions for early software-on-SoC optimization

Content Provider	ACM Digital Library
Author	Clouard, Alain Ntafam, Perrin N. Paire, Eric Petrot, Frédéric
Abstract	A System-On-Chip (SoC) is a combination of hardware and software which interact to perform a set of functions, usually for some specific application domain. However, with the increasing complexity of both hardware and software, estimating and optimizing the performance of software on SoC during the design process is becoming a difficult objective. The aim of this paper is to show that observability provided by cycle accurate (CA) simulations using virtual platforms available early in the design flow is helping to obtain estimations and to design a software strategy which optimizes software-on-SoC performance, based on some particular metrics. We apply this approach to a case study which tackles the memory wall problem and contributes to its resolution by using software data prefetching technique. We exploit profiling capabilities provided by simulation models, by analyzing the collected data to identify high memory accesses latencies and finally inserting data prefetching instructions in a suitable and non-intuitive way for increasing system execution performance. Bubble sort is used as experimental methodology and the Inverse Discrete Cosine Transform (JPEG IDCT) routine typical from an industrial decoder is used as initial case study. Based on platform simulation observability, we reach an improvement of more than 25% on the overall execution time.
Starting Page	93
Ending Page	99
Page Count	7
File Format	PDF
ISBN	9781450345354
DOI	10.1145/2990299.2990315
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2016-10-01
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Embedded software-on-soc optimization Software-controlled data prefetching Cycle accurate virtual platforms
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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