NDLI: Conflict driven techniques for improving deterministic test pattern generation

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Conflict driven techniques for improving deterministic test pattern generation

Content Provider	ACM Digital Library
Author	Wang, Chen Pomeranz, Irith Rajski, Janusz Lin, Xijiang Reddy, Sudhakar M.
Abstract	This work presents several new techniques for enhancing the performance of deterministic test pattern generation for VLSI circuits. The techniques introduced are called dynamic decision ordering, conflict driven recursive learning and conflict learning. An important feature shared by all these techniques is that they are triggered by the occurrence of a conflict in the generation of tests. Hence, they are not active all the time nor for all the faults. This feature allows the ATPG system that uses these techniques to resolve hard-to-resolve faults with far fewer backtracks and leaves the system as efficient as before in the absence of conflicts. We have incorporated these techniques into a commercial D-algorithm based ATPG tool. The experimental results on full scan versions of ITC'99 benchmark circuits demonstrate an improvement of the ATPG system both in the number of aborted faults and in test generation time.
Starting Page	87
Ending Page	93
Page Count	7
File Format	PDF
ISBN	0780376072
ISSN	10923152
DOI	10.1145/774572.774585
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2002-11-10
Publisher Place	New York
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Software Computer Science Applications

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