NDLI: General microprogram width reduction using generator sets

Content Provider	ACM Digital Library
Author	Powers, V. Michael Martinez-Carballido, Jorge Francisco
Abstract	The problem of reducing the microinstruction length for a parallel microprogram, by trading off microprogram width (bits) for subsequent logic, is considered. In a generalization of previous methods, it is shown that a considerable reduction of microprogram storage size can be achieved by selecting a subset of the original microorders to serve as inputs to some generating logic in order to provide all the microorders in the original microprogram. Heuristic solution methods are shown, along with ways to control the bounds of the solutions, allowing the designer the choice between a fast solution and an optimal solution. Examples show the effects of using these methods, alone and in conjunction with previously published methods for width reduction. Applications of the width reduction technique to reasonable modern design situations are discussed.
Starting Page	144
Ending Page	153
Page Count	10
File Format	PDF
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-12-01
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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General microprogram width reduction using generator sets