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| Content Provider | ACM Digital Library |
|---|---|
| Author | Li, Hao Hu, Chengchen Wang, Ruilong Hu, Liujia Zhang, Peng Xiong, Lei Zhang, Yuemei |
| Abstract | How to debug large networks is always a challenging task. Software Defined Network (SDN) offers a centralized con- trol platform where operators can statically verify network policies, instead of checking configuration files device-by-device. While such a static verification is useful, it is still not enough: due to data plane faults, packets may not be forwarded according to control plane policies, resulting in network faults at runtime. To address this issue, we present VeriDP, a tool that can continuously monitor what we call control-data plane consistency, defined as the consistency between control plane policies and data plane forwarding behaviors. We prototype VeriDP with small modifications of both hardware and software SDN switches, and show that it can achieve a verification speed of 3 μs per packet, with a false negative rate as low as 0.1%, for the Stanford backbone and Internet2 topologies. In addition, when verification fails, VeriDP can localize faulty switches with a probability as high as 96% for fat tree topologies. |
| Starting Page | 19 |
| Ending Page | 33 |
| Page Count | 15 |
| File Format | |
| ISBN | 9781450342926 |
| DOI | 10.1145/2999572.2999605 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2016-12-06 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Consistency Verification Software defined network |
| Content Type | Text |
| Resource Type | Article |
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