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  1. Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '16)
  2. Brain Inspired Computing
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Programming Uncertain hings
WiSync: An Architecture for Fast Synchronization through On-Chip Wireless Communication
Paravirtual Remote I/O
Prudent Memory Reclamation in Procrastination-Based Synchronization
How to Build Static Checking Systems Using Orders of Magnitude Less Code
M3: A Hardware/Operating-System Co-Design to Tame Heterogeneous Manycores
True IOMMU Protection from DMA Attacks: When Copy is Faster than Zero Copy
Synopsis of the ASPLOS '16 Wild and Crazy Ideas (WACI) Invited-Speakers Session
Brain Inspired Computing
Scaling up Superoptimization
Maximizing Performance Under a Power Cap: A Comparison of Hardware, Software, and Hybrid Techniques
NVWAL: Exploiting NVRAM in Write-Ahead Logging
Interference Management for Distributed Parallel Applications in Consolidated Clusters
LDX: Causality Inference by Lightweight Dual Execution
Scalable Kernel TCP Design and Implementation for Short-Lived Connections
Programmer Productivity in a World of Mushy Interfaces: Challenges of the Post-ISA Reality
RAPID Programming of Pattern-Recognition Processors
Generating Configurable Hardware from Parallel Patterns
PIFT: Predictive Information-Flow Tracking
ProteusTM: Abstraction Meets Performance in Transactional Memory
ReBudget: Trading Off Efficiency vs. Fairness in Market-Based Multicore Resource Allocation via Runtime Budget Reassignment
High Performance Packet Processing with FlexNIC
Whirlpool: Improving Dynamic Cache Management with Static Data Classification
TxRace: Efficient Data Race Detection Using Commodity Hardware Transactional Memory
Sidewinder: An Energy Efficient and Developer Friendly Heterogeneous Architecture for Continuous Mobile Sensing
Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers
Lifting Assembly to Intermediate Representation: A Novel Approach Leveraging Compilers
The Computational Sprinting Game
High-Performance Transactions for Persistent Memories
Taurus: A Holistic Language Runtime System for Coordinating Distributed Managed-Language Applications
TaxDC: A Taxonomy of Non-Deterministic Concurrency Bugs in Datacenter Distributed Systems
SpaceJMP: Programming with Multiple Virtual Address Spaces
Proactive Control of Approximate Programs
DySel: Lightweight Dynamic Selection for Kernel-based Data-parallel Programming Model
HIPStR: Heterogeneous-ISA Program State Relocation
CSR: Core Surprise Removal in Commodity Operating Systems
Dirigent: Enforcing QoS for Latency-Critical Tasks on Shared Multicore Systems
Specifying and Checking File System Crash-Consistency Models
TPC: Target-Driven Parallelism Combining Prediction and Correction to Reduce Tail Latency in Interactive Services
Cogent: Verifying High-Assurance File System Implementations
OpenPiton: An Open Source Manycore Research Framework
Sego: Pervasive Trusted Metadata for Efficiently Verified Untrusted System Services
Architecture-Adaptive Code Variant Tuning
An Energy-interference-free Hardware-Software Debugger for Intermittent Energy-harvesting Systems
High-Density Image Storage Using Approximate Memory Cells
HCloud: Resource-Efficient Provisioning in Shared Cloud Systems
RID: Finding Reference Count Bugs with Inconsistent Path Pair Checking
memif: Towards Programming Heterogeneous Memory Asynchronously
AxGames: Towards Crowdsourcing Quality Target Determination in Approximate Computing
Baymax: QoS Awareness and Increased Utilization for Non-Preemptive Accelerators in Warehouse Scale Computers
ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks
CASPAR: Breaking Serialization in Lock-Free Multicore Synchronization
COATCheck: Verifying Memory Ordering at the Hardware-OS Interface
Failure-Atomic Persistent Memory Updates via JUSTDO Logging
CloudSeer: Workflow Monitoring of Cloud Infrastructures via Interleaved Logs
A DNA-Based Archival Storage System
Analyzing Behavior Specialized Acceleration

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Brain Inspired Computing

Content Provider ACM Digital Library
Author Williams, R. Stanley
Starting Page 295
Ending Page 295
Page Count 1
File Format PDF
ISBN 9781450340915
DOI 10.1145/2872362.2872417
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2016-03-25
Publisher Place New York
Access Restriction Subscribed
Subject Keyword Cortical architecture Non-volatile memory Neuromorphic computing Neuromorphic co-processors and accelerators System-on-chip Dark silicon
Content Type Text
Resource Type Article
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