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A hierarchical model of a graphics system

Content Provider	ACM Digital Library
Author	Kilgour, A. C.
Abstract	This paper presents a model of a graphics system as a hierarchy of communicating modules. Each module has two input ports and two output ports, and may be regarded as a generalisation of the "software filter" proposed by Kernighan & Plauger [KERN76]. Each module accepts commands from a high r-level module (or the application program) and event records from a lower-level module. A general framework for the internal organisation of a module is presented, which allows for internal feedback from the event record input port to the low-level output port, the specification and control of concurrent background processes (e.g. for continuous picture modification), and the dynamic modification of the feedback behaviour. Extending the terminology introduced by Houlton & Corman [MOULT76], a module is seen as a "programmable graphics multi-processor".Because feedback behaviour is under the control of the superior module, the proposed model is more flexible and general than that underlying currently proposed standards, e.g. the ACM GSPC "Core" System [GSPC77]. The application of the model to the design of a satellite system controlling a random-scan refreshed display, and a module to control a simple raster-scan terminal, are described, and the implications for current work on graphics standards discussed.
Starting Page	35
Ending Page	47
Page Count	13
File Format	PDF
ISSN	00978930
DOI	10.1145/988460.988462
Journal	ACM SIGGRAPH Computer Graphics (COMG)
Volume Number	15
Issue Number	1
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1988-08-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Graphic system modeling Methodology of interaction Distributed graphics systems Graphics standards
Content Type	Text
Resource Type	Article
Subject	Computer Science Computer Graphics and Computer-Aided Design

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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