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| Content Provider | ACM Digital Library |
|---|---|
| Author | Adams, Michael D. Wise, David S. |
| Abstract | Suppose the bits of a computer word are partitioned into d disjoint sets, each of which is used to represent one of a d-tuple of cartesian indices into d-dimensional space. Then, regardless of the partition, simple group operations and comparisons can be implemented for each index on a conventional processor in a sequence of two or three register operations.These indexings allow any blocked algorithm from linear algebra to use some non-standard matrix orderings that increase locality and enhance their performance. The underlying implementations were designed for alternating bit postitions to index Morton-ordered matrices, but they apply, as well, to any bit partitioning. A hybrid ordering of the elements of a matrix becomes possible, therefore, with row-/column-major ordering within cache-sized blocks and Morton ordering of those blocks, themselves. So, one can enjoy the temporal locality of nested blocks, as well as compiler optimizations on row- or column-major ordering in base blocks. |
| Starting Page | 39 |
| Ending Page | 45 |
| Page Count | 7 |
| File Format | |
| ISSN | 03621340 15581160 |
| DOI | 10.1145/1149982.1149987 |
| Journal | ACM SIGPLAN Notices (SIGP) |
| Volume Number | 41 |
| Issue Number | 5 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 1983-05-01 |
| Publisher Place | New York |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Quadtrees Dilated integers Morton order Index arithmetic Compilers |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Software |
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