NDLI: Bidwidth analysis with application to silicon compilation

Content Provider	ACM Digital Library
Author	Babb, Jonathan Amarasinghe, Saman Stephenson, Mark
Abstract	This paper introduces Bitwise, a compiler that minimizes the bitwidth the number of bits used to represent each operand for both integers and pointers in a program. By propagating 70static information both forward and backward in the program dataflow graph, Bitwise frees the programmer from declaring bitwidth invariants in cases where the compiler can determine bitwidths automatically. Because loop instructions comprise the bulk of dynamically executed instructions, Bitwise incorporates sophisticated loop analysis techniques for identifying bitwidths. We find a rich opportunity for bitwidth reduction in modern multimedia and streaming application workloads. For new architectures that support sub-word data-types, we expect that our bitwidth reductions will save power and increase processor performance. This paper also applies our analysis to silicon compilation, thetranslation of programs into custom hardware, to realize the full benefits of bitwidth reduction. We describe our integration of Bitwise with the DeepC Silicon Compiler. By taking advantage of bitwidth information during architectural synthesis, we reduce silicon real estate by 15 - 86%, improve clock speed by 3 - 249%, and reduce power by 46 - 73%. The next era of general purpose and reconfigurable architectures should strive to capture a portion of these gains.
Starting Page	108
Ending Page	120
Page Count	13
File Format	PDF
ISSN	03621340 15581160
DOI	10.1145/358438.349317
Journal	ACM SIGPLAN Notices (SIGP)
Volume Number	35
Issue Number	5
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1983-05-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Bidwidth analysis with application to silicon compilation

An approach to incremental compilation

Interprocedural partial redundancy elimination and its application to distributed memory compilation

Staged compilation

HARP: FORTRAN to silicon (compilation system)

ACME:adaptive compilation made efficient

When to use a compilation service?

Extensions to PASCAL for separate compilation

Compilation into actors

Bidwidth analysis with application to silicon compilation

Similar Documents

Bidwidth analysis with application to silicon compilation

An approach to incremental compilation

Interprocedural partial redundancy elimination and its application to distributed memory compilation

Staged compilation

HARP: FORTRAN to silicon (compilation system)

ACME:adaptive compilation made efficient

When to use a compilation service?

Extensions to PASCAL for separate compilation

Compilation into actors

Bidwidth analysis with application to silicon compilation