NDLI: Effective parallelization of loops in the presence of I/O operations

Content Provider	ACM Digital Library
Author	Neamtiu, Iulian Feng, Min Gupta, Rajiv
Abstract	Software-based thread-level parallelization has been widely studied for exploiting data parallelism in purely computational loops to improve program performance on multiprocessors. However, none of the previous efforts deal with efficient parallelization of hybrid loops, i.e., loops that contain a mix of computation and I/O operations. In this paper, we propose a set of techniques for efficiently parallelizing hybrid loops. Our techniques apply DOALL parallelism to hybrid loops by breaking the cross-iteration dependences caused by I/O operations. We also support speculative execution of I/O operations to enable speculative parallelization of hybrid loops. Helper threading is used to reduce the I/O bus contention caused by the improved parallelism. We provide an easy-to-use programming model for exploiting parallelism in loops with I/O operations. Parallelizing hybrid loops using our model requires few modifications to the code. We have developed a prototype implementation of our programming model. We have evaluated our implementation on a 24-core machine using eight applications, including a widely-used genomic sequence assembler and a multi-player game server, and others from PARSEC and SPEC CPU2000 benchmark suites. The hybrid loops in these applications take 23%-99% of the total execution time on our 24-core machine. The parallelized applications achieve speedups of 3.0x-12.8x with hybrid loop parallelization over the sequential versions of the same applications. Compared to the versions of applications where only computation loops are parallelized, hybrid loop parallelization improves the application performance by 68% on average.
Starting Page	487
Ending Page	498
Page Count	12
File Format	PDF
ISSN	03621340 15581160
DOI	10.1145/2345156.2254122
Journal	ACM SIGPLAN Notices (SIGP)
Volume Number	47
Issue Number	6
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1983-05-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Speculative parallelization I/o contention Doall parallelization Helper threading
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Effective parallelization of loops in the presence of I/O operations

Supporting speculative parallelization in the presence of dynamic data structures

Continuous speculative program parallelization in software

Speculative parallelization on GPGPUs

A cost-driven compilation framework for speculative parallelization of sequential programs

Software behavior oriented parallelization

Toward efficient and robust software speculative parallelization on multiprocessors

Enhanced speculative parallelization via incremental recovery

Speculative parallelization using state separation and multiple value prediction

Effective parallelization of loops in the presence of I/O operations

Similar Documents

Effective parallelization of loops in the presence of I/O operations

Supporting speculative parallelization in the presence of dynamic data structures

Continuous speculative program parallelization in software

Speculative parallelization on GPGPUs

A cost-driven compilation framework for speculative parallelization of sequential programs

Software behavior oriented parallelization

Toward efficient and robust software speculative parallelization on multiprocessors

Enhanced speculative parallelization via incremental recovery

Speculative parallelization using state separation and multiple value prediction

Effective parallelization of loops in the presence of I/O operations