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  1. ACM SIGARCH Computer Architecture News (CARN)
  2. Volume 25
  3. Volume 25, Issue 5, Dec. 1997
  4. An innovative implementation for directory-based cache coherence in shared memory multiprocessors
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Volume 25, Issue 5, Dec. 1997
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An innovative implementation for directory-based cache coherence in shared memory multiprocessors
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An innovative implementation for directory-based cache coherence in shared memory multiprocessors

Content Provider ACM Digital Library
Author Zhu, Ming Shi, Weisong Hu, Weiwu
Abstract Directory-based cache coherence protocol is accepted as the common technique in large scale shared memory multiprocessors because of its scalability. Although it was extensively studied in the past, however, the memory overhead and long miss penalty entailed by this protocol are the major obstacles to scale for large scale multiprocessors. On the other hand, the ever-increasing cache line size makes the false sharing problem more serious than before, which will lead to high miss rate. Based on the scope consistency, we propose a lock-specific home-based cache coherence protocol. In this new cache coherence protocol, all directory memory overhead are eleminated completely and false sharing problem and high miss rate will be sloved greatly at the cost of small write notice buffer in each processor.
Starting Page 2
Ending Page 9
Page Count 8
File Format PDF
ISSN 01635964
DOI 10.1145/271014.271017
Journal ACM SIGARCH Computer Architecture News (CARN)
Volume Number 25
Issue Number 5
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 1981-04-01
Publisher Place New York
Access Restriction One Nation One Subscription (ONOS)
Subject Keyword Directory-based cache coherence protocol False sharing Memory overhead Scope consistency
Content Type Text
Resource Type Article
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