NDLI: Automated design of finite state machine predictors for customized processors

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Volume 29, Issue 5, December 2001

Volume 29, Issue 4, September 2001

Volume 29, Issue 3, June 2001

Volume 29, Issue 2, May 2001

Execution-based prediction using speculative slices

Speculative precomputation

Dynamically allocating processor resources between nearby and distant ILP

Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors

Data prefetching by dependence graph precomputation

Concurrency, latency, or system overhead

Focusing processor policies via critical-path prediction

Automated design of finite state machine predictors for customized processors

Better exploration of region-level value locality with integrated computation reuse and value prediction

QoS provisioning in clusters

Locality vs. criticality

Dead-block prediction & dead-block correlating prefetchers

Code layout optimizations for transaction processing workloads

Exploring and exploiting wire-level pipelining in emerging technologies

A simple method for extracting models for protocol code

Removing architectural bottlenecks to the scalability of speculative parallelization

Power and energy reduction via pipeline balancing

Energy-effective issue logic

Variability in the execution of multimedia applications and implications for architecture

Rapid profiling via stratified sampling

Volume 29, Issue 1, March 2001

Automated design of finite state machine predictors for customized processors

Content Provider	ACM Digital Library
Author	Calder, Brad Sherwood, Timothy
Abstract	Customized processors use compiler analysis and design automation techniques to take a generalized architectural model and create a specific instance of it which is optimized to a given application or set of applications. These processors offer the promise of satisfying the high performance needs of the embedded community while simultaneously shrinking design times.Finite State Machines (FSM) are a fundamental building block in computer architecture, and are used to control and optimize all types of prediction and speculation, now even in the embedded space. They are used for branch prediction, cache replacement policies, and confidence estimation and accuracy counters for a variety of optimizations.In this paper, we present a framework for automated design of small FSM predictors for customized processors. Our approach can be used to automatically generate small FSM predictors to perform well over a suite of applications, tailored to a specific application, or even a specific instruction. We evaluate the use of these customized FSM predictors for branch prediction over a set of benchmarks.
Starting Page	86
Ending Page	97
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/384285.379254
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	29
Issue Number	2
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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