NDLI: A recursive computer architecture for VLSI

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Volume 10, Issue 6, December 1982

Volume 10, Issue 5, September 1982

Volume 10, Issue 4, June 1982

Volume 10, Issue 3, April 1982

RISC assessment

Measurement and analysis of instruction use in the VAX-11/780

HLL architectures

The NYU Ultracomputer—designing a MIMD, shared-memory parallel machine (Extended Abstract)

VLSI architectures for high speed recognition of context-free languages and finite-state languages

Asynchronous and clocked control structures for VLSI based interconnection networks

Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network

The Gamma network

A control processor for a reconfigurable array computer

A general class of processor interconnection strategies

Instruction set design issues relating to a static dataflow computer

Decoupled access/execute computer architectures

A data flow architecture with a paged memory system

Efficient code generation for horizontal architectures

A logic simulation machine

Towards a family of languages for the design and implementation of machine architectures

Rollback propagation detection and performance evaluation of FTMR2M—a fault-tolerant multiprocessor

Design of a 2 × 2 fault-tolerant switching element

Fault-tolerant wafer-scale architectures for VLSI

Database filters

On the semantic structure of information - A proposal of the abstract storage architecture

Hardware sorter and its application to data base machine

A recursive computer architecture for VLSI

The heap/substitution concept - an implementation of functional operations on data structures for a reduction machine

A shared resource algorithm for distributed simulation

Duplication of packets and their detection in X.25 communication protocols

A multiple processor system for real time control tasks

A heterogeneous multiprocessor design and the distributed scheduling of its task group workload

A dual processor VAX 11/780

Effects of cache coherency in multiprocessors

Probabilistic analysis of a crossbar switch

Finding an extremum in a network

Resource allocation in rectangular SW banyans

List of authors

Volume 10, Issue 2, March 1982

Volume 10, Issue 1, January 1982

A recursive computer architecture for VLSI

Content Provider	ACM Digital Library
Author	Treleaven, Philip C. Hopkins, Richard P.
Abstract	We present a general-purpose computer architecture based on the concept of recursion, suitable for VLSI computer systems built from replicated (LEGO-like) computing elements. The recursive computer architecture is defined by presenting a program organisation, a machine organisation and an experimental machine implementation oriented to VLSI. The program organisation, called recursive control flow, attempts a synthesis of the concepts underlying traditional control flow, data flow and reduction, to exploit the individual strengths of each organisation. The machine organisation is based on replicated general-purpose computing elements, as well as special-purpose computing elements that allow the function of individual computer systems to be specialised. These elements are interconnected to form a larger computer system and cooperate in the concurrent execution of a program. The experimental implementation is being restricted to simple, identical microcomputers each containing a memory, a processor and a communications capability. This future generation of LEGO-like computer systems are termed fifth generation computers [1] by the Japanese.
Starting Page	229
Ending Page	238
Page Count	10
File Format	PDF
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	10
Issue Number	3
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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