NDLI: Thread-level parallelism and interactive performance of desktop applications (CARN, Vol. 28, Issue. 5)

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Volume 28, Issue 5, Dec. 2000

Designing computer systems with MEMS-based storage

Architecture and design of AlphaServer GS320

Timestamp snooping

FLASH vs. (Simulated) FLASH

Using meta-level compilation to check FLASH protocol code

Evaluating design alternatives for reliable communication on high-speed networks

Communication scheduling

System architecture directions for networked sensors

Power aware page allocation

Thread-level parallelism and interactive performance of desktop applications

Effective null pointer check elimination utilizing hardware trap

Frequent value locality and value-centric data cache design

Efficient and flexible value sampling

Architectural support for copy and tamper resistant software

Architectural support for fast symmetric-key cryptography

Software profiling for hot path prediction

OS and compiler considerations in the design of the IA-64 architecture

Hardware support for dynamic activation of compiler-directed computation reuse

Symbiotic jobscheduling for a simultaneous multithreaded processor

An analysis of operating system behavior on a simultaneous multithreaded architecture

Slipstream processors

Volume 28, Issue 4, Sept., 2000

Volume 28, Issue 3, June 2000

Volume 28, Issue 2, May 2000

Volume 28, Issue 1, March 2000

Thread-level parallelism and interactive performance of desktop applications (CARN, Vol. 28, Issue. 5)

Content Provider	ACM Digital Library
Author	Mudge, Trevor Uhlig, Rich Reinhardt, Steve Flautner, Kristián
Abstract	Multiprocessing is already prevalent in servers where multiple clients present an obvious source of thread-level parallelism. However, the case for multiprocessing is less clear for desktop applications. Nevertheless, architects are designing processors that count on the availability of thread-level parallelism. Unlike server workloads, the primary requirement of interactive applications is to respond to user events under human perception bounds rather than to maximize end-to-end throughput. In this paper we report on the thread-level parallelism and interactive response time of a variety of desktop applications. By tracking the communication between tasks, we can focus our measurements on the portions of the benchmark's execution that have the greatest impact on the user. We find that running our benchmarks on a dual-processor machine improves response time of mouse-click events by as much as 36% and 22% on average---out of a maximum possible 50%. The benefits of multiprocessing are even more apparent when background tasks are considered. In our experiments, running a simple MP3 playback program in the background increases response time by 14% on a uniprocessor while it only increases the response time on a dual processor by 4%. When response times are fast enough for further improvements to be imperceptible, the increased idle time after interactive episodes could be exploited to build systems that are more power efficient.
Starting Page	129
Ending Page	138
Page Count	10
File Format	PDF
ISSN	01635964
DOI	10.1145/378995.379233
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	28
Issue Number	5
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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