NDLI: Guaranteed scheduling for switches with configuration overhead

Content Provider	ACM Digital Library
Author	Dally, William J. Towles, Brian
Abstract	In this paper, we present three algorithms that provide performance guarantees for scheduling switches, such as optical switches, with configuration overhead. Each algorithm emulates an unconstrained (zero overhead) switch by accumulating a batch of configuration requests and generating a corresponding schedule for a constrained switch. Speedup is required both to cover the configuration overhead of the switch and to compensate for empty slots left by the scheduling algorithm. Scheduling algorithms are characterized by the number of configurations $\textit{Ns}$ they require to $\textit{cover}$ a batch of requests and the speedup required to compensate for empty slots $\textit{S}min.$ Initially, all switch reconfiguration is assumed to occur simultaneously. We show that a well-known exact matching algorithm, EXACT, leaves no empty slots (i.e., $\textit{S}min$ = 1), but requires Ns ≈ $N^{2}$ configurations for an $\textit{N}-port$ switch leading to high configuration overhead or large batches and, hence, high delay. We present two new algorithms that reduce the number of configurations required substantially. MIN covers a batch of requests in the minimum possible number of configurations, Ns = N, but at the expense of many empty slots, $\textit{S}min$ ≈ 4log2 $\textit{N}.$ DOUBLE strikes a balance, requiring twice as many $configurations,\textit{Ns}$ = $2\textit{N},$ while reducing the number of empty slots so that $\textit{S}min$ = 2. Loosening the restriction on reconfiguration times, the scheduling problem is cast as an open shop. The best known practical scheduling algorithm for open shops, list scheduling (LIST), gives the same emulation requirements as DOUBLE. Therefore, we conclude that our architecture gains no advantages from allowing arbitrary switch reconfiguration. Finally, we show that DOUBLE and LIST offer the lowest required speedup to emulate an unconstrained switch across a wide range of port count and delay.
Starting Page	835
Ending Page	847
Page Count	13
File Format	PDF
ISSN	10636692
DOI	10.1109/TNET.2003.818190
Volume Number	11
Issue Number	5
Journal	IEEE/ACM Transactions on Networking (TON)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2003-10-01
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Optical switches Packet switching
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Computer Networks and Communications Software Computer Science Applications

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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