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| Content Provider | ACM Digital Library |
|---|---|
| Author | Sun, Xiaobai Chase, Jeffrey S. Jin, Wei |
| Copyright Year | 2001 |
| Abstract | Trace-driven simulation is a valuable tool for evaluating I/O systems. This article presents a new algorithm, called FASTSLIM, that reduces the size of I/O traces and improves simulation performance without compromising simulation accuracy. FASTSLIM is more general than existing trace reduction algorithms in two ways. First, it is prefetch-safe: traces reduced by FASTSLIM yield provably exact simulations of I/O systems that use prefetching, a key technique for improving I/O performance. Second, FASTSLIM is compatible with a wide range of replacement policies, including common practical approximations to LRU. FASTSLIM-reduced traces are safe for simulations of storage hierarchies and systems with parallel disks. This article gives a formal treatment of prefetching and replacement issues for trace reduction, introduces the FASTSLIM algorithm, proves that FASTSLIM and variants are safe for a broad range of I/O caching and prefetching systems, and presents empirical results comparing FASTSLIM to competing trace reduction algorithms. |
| Starting Page | 125 |
| Ending Page | 160 |
| Page Count | 36 |
| File Format | |
| ISSN | 10493301 |
| e-ISSN | 15581195 |
| DOI | 10.1145/384169.384170 |
| Volume Number | 11 |
| Issue Number | 2 |
| Journal | ACM Transactions on Modeling and Computer Simulation (TOMACS) |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2001-04-01 |
| Publisher Place | New York |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | I/O architectures File caching Operating systems Performance evaluation Prefetching Trace reduction Trace-driven simulation Virtual memory |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Science Applications Modeling and Simulation |
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