NDLI: RAW 2014: Random Number Generators on FPGAs (TRETS, Vol.9, Issue 2)

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ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 10

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 9

Issue 4(Regular Papers and Special Section on Field Programmable Gate Arrays (FPGA) 2015), September 2016

Issue 3(Special Issue on Reconfigurable Components with Source Code), September 2016

Issue 2(Special Section on RAW2014), February 2016

Guest Editorial RAW 2014

Value State Flow Graph: A Dataflow Compiler IR for Accelerating Control-Intensive Code in Spatial Hardware

RAW 2014: Random Number Generators on FPGAs

A Reconfigurable Architecture for the Detection of Strongly Connected Components

CORDIC-Based Enhanced Systolic Array Architecture for QR Decomposition

Separation Logic for High-Level Synthesis

Compact and On-the-Fly Secure Dynamic Reconfiguration for Volatile FPGAs

Coarse-Grained Architecture for Fingerprint Matching

Issue 1(Special Section on the 2014 International Symposium on Applied Reconfigurable Computing), November 2015

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 8

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 7

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 6

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 5

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 4

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 3

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 2

ACM Transactions on Reconfigurable Technology and Systems (TRETS) : Volume 1

RAW 2014: Random Number Generators on FPGAs (TRETS, Vol.9, Issue 2)

Content Provider	ACM Digital Library
Author	Vogt, Markus Pionteck, Thilo Raitza, Michael Hochberger, Christian
Copyright Year	2015
Abstract	Random numbers are important ingredients in a number of applications. Especially in a security context, they must be well distributed and unpredictable. We investigate the practical use of random number generators (RNGs) that are built from digital elements found in FPGAs. For this, we implement different types of ring oscillators (ROs) and memory collision-based circuits on FPGAs from major vendors. Implementing RNGs on the same device as the rest of the system benefits an overall reduction of vulnerability to attacks and wire tapping. Nevertheless, we investigate different attacks by tampering with power supply, chip temperature, and by exposition to strong magnetic fields and X-radiation. We also consider their usability as massively deployed components, whose functionality cannot be tested individually anymore, by conducting a technology invariance experiment. Our experiments show that BlockRAM-based RNGs cannot be considered as a suitable entropy source. We further show that RO-based RNGs work reliably under a wide range of operating conditions. While magnetic fields and X-rays did not induce any notable change, voltage and temperature variations caused an increase in propagation delays within the circuits. We show how reliable RNGs can be constructed and deployed on FPGAs.
Starting Page	1
Ending Page	21
Page Count	21
File Format	PDF
ISSN	19367406
e-ISSN	19367414
DOI	10.1145/2807699
Volume Number	9
Issue Number	2
Journal	ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-12-04
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Entropy source FPGA X-radiation Active attack on random number generator Cryptography Magnetic field Power supply Technology invariance Temperature True random number generator
Content Type	Text
Resource Type	Article
Subject	Computer Science

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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RAW 2014: Random Number Generators on FPGAs (TRETS, Vol.9, Issue 2)

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RAW 2014: Random Number Generators on FPGAs (TRETS, Vol.9, Issue 2)