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| Content Provider | ACM Digital Library |
|---|---|
| Author | Jiang, Iris Hui-Ru Ho, Tsung-Yi Lin, Jing-Wei |
| Copyright Year | 2012 |
| Abstract | Electromigration and voltage drop (IR-drop) are two major reliability issues in modern IC design. Electromigration gradually creates permanently open or short circuits due to excessive current densities; IR-drop causes insufficient power supply, thus degrading performance or even inducing functional errors because of nonzero wire resistance. Both types of failure can be triggered by insufficient wire widths. Although expanding the wire width alleviates electromigration and IR-drop, unlimited expansion not only increases the routing cost, but may also be infeasible due to the limited routing resource. In addition, electromigration and IR-drop manifest mainly in the power/ground (P/G) network. Therefore, taking wire widths into consideration is desirable to prevent electromigration and IR-drop at P/G routing. Unlike mature digital IC designs, P/G routing in analog ICs has not yet been well studied. In a conventional design, analog designers manually route P/G networks by implementing greedy strategies. However, the growing scale of analog ICs renders manual routing inefficient, and the greedy strategies may be ineffective when electromigration and IR-drop are considered. This study distances itself from conventional manual design and proposes an automatic analog P/G router that considers electromigration and IR-drops. First, employing transportation formulation, this article constructs an electromigration-aware rectilinear Steiner tree with the minimum routing cost. Second, without changing the solution quality, wires are bundled to release routing space for enhancing routability and relaxing congestion. A wire width extension method is subsequently adopted to reduce wire resistance for IR-drop safety. Compared with high-tech designs, the proposed approach achieves equally optimal solutions for electromigration avoidance, with superior efficiencies. Furthermore, via industrial design, experimental results also show the effectiveness and efficiency of the proposed algorithm for electromigration prevention and IR-drop reduction. |
| Starting Page | 1 |
| Ending Page | 26 |
| Page Count | 26 |
| File Format | |
| ISSN | 10844309 |
| e-ISSN | 15577309 |
| DOI | 10.1145/2071356.2071362 |
| Volume Number | 17 |
| Issue Number | 1 |
| Journal | ACM Transactions on Design Automation of Electronic Systems (TODAES) |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2012-01-01 |
| Publisher Place | New York |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Analog IR-drop Steiner tree Electromigration Power/ground network Routing |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Computer Science Applications Electrical and Electronic Engineering |
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