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  1. International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems.
  2. Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'05)
  3. On the use of bit filters in shared nothing partitioned systems
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2008 International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
Innovative architecture for future generation high-performance processors and systems (iwia 2007)
International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems (IWIA'06)
Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'05)
Innovative architecture for future generation high-performance processors and systems
Message from the Editors
Committees
Superscalar processor with multi-bank register file
Steering and forwarding techniques for reducing memory communication on a clustered microarchitecture
The bimode++ branch predictor
On the use of bit filters in shared nothing partitioned systems
Incorporating a secure coprocessor in the database-as-a-service model
Understanding and comparing the performance of optimized JVMs
An exploration of the technology space for multi-core memory/logic chips for highly scalable parallel systems
Optimal loop-unrolling mechanisms and architectural extensions for an energy-efficient design of shared register files in MPSoCs
A New Kind of Processor Interface for a System-on-Chip Processor with TIE Ports and TIE Queues of Xtensa LX
A multi-thread processor architecture based on the continuation model
PRESTOR-1: a processor extending multithreaded architecture
Continuum computer architecture for nano-scale and ultra-high clock rate technologies
Performance evaluation of dynamic network reconfiguration using Detour-UD routing
Preliminary evaluations of a FPGA-based-prototype of DIMMnet-2 network interface
SIMD optimization in COINS compiler infrastructure
Performance comparison of vector-calculations between Itanium2 and other processors
Author index
Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'04)
Innovative Architecture for Future Generation High-Performance Processors and Systems, 2003
International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
2001 Innovative Architecture for Future Generation High-Performance Processors and Systems
Innovative Architecture for Future Generation High-Performance Processors and Systems (Cat. No.PR00650)
Innovative Architecture for Future Generation High-Performance Processors and Systems
Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems

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On the use of bit filters in shared nothing partitioned systems

Content Provider IEEE Xplore Digital Library
Author Aguilar-Saborit, J. Muntes-Mulero, V. Zuzarte, C. Pereyra, H. Larriba-Pey, J.-L.
Copyright Year 2005
Description Author affiliation: Dept. of Comput. Archit., Univ. Politecnica de Catalunya, Barcelona, Spain (Aguilar-Saborit, J.; Muntes-Mulero, V.)
Abstract Parallel query processing is in the core of many business analysis environments. Such applications impose a high demand on the computer hardware to achieve results in reasonable times, specially when queries are launched against huge amounts of warehouse data. We look into the problem of parallel query processing on large data sets focusing on a rational use of the network and memory resources. In this context, we propose a new protocol to make use of bit filters in parallel shared nothing systems for non-collocated joins. We call our protocol remote bit filters with requests (RBF/sub R/). We have implemented a prototype of RBF/sub R/ for the first time in a major commercial database, IBM/spl reg/ DB2 Universal Database/spl trade/(DB2 UDB). RBF/sub R/ has two important advantages over the previous usage of bit filters in the same context. First, it reduces the amount of memory used compared to previous solutions. This allows for the processing of more or larger queries. Second, the protocol itself has an insignificant impact on communication. This means that it is as efficient as the previous strategies, avoiding the saturation of the network in parallel intensive network usage environments.
File Size 205820
File Format PDF
ISBN 0769524834
ISSN 15373223
DOI 10.1109/IWIA.2005.34
Language English
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date 2005-01-17
Publisher Place USA
Access Restriction Subscribed
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword Filters Protocols Hardware Databases Business Computer architecture Query processing Application software Prototypes Context
Content Type Text
Resource Type Article
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