Loading...
Please wait, while we are loading the content...
Semiconductor Device
| Content Provider | The Lens |
|---|---|
| Abstract | A semiconductor device includes a semiconductor portion of a first conductivity type, a first semiconductor layer and a second semiconductor layer of a second conductivity type separated from each other and provided in an upper layer portion of the semiconductor portion, a gate electrode provided on the semiconductor portion, a first contact piercing the gate electrode, a second contact piercing the gate electrode, a first insulating film provided between the first semiconductor layer and a side surface of the first contact and between the first contact and the gate electrode, and a second insulating film provided between the second semiconductor layer and a side surface of the second contact and between the second contact and the gate electrode. A lower portion of the first contact is disposed inside the first semiconductor layer, a lower end of the first contact is connected to the first semiconductor layer. |
| Related Links | https://www.lens.org/lens/patent/012-557-685-820-718/frontpage |
| Language | English |
| Publisher Date | 2019-03-21 |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Patent |
| Jurisdiction | United States of America |
| Date Applied | 2018-03-14 |
| Applicant | Toshiba Kk Toshiba Electronic Devices & Storage Corp |
| Application No. | 201815920981 |
| Claim | A semiconductor device, comprising: a semiconductor portion of a first conductivity type; a first semiconductor layer and a second semiconductor layer separated from each other and provided in an upper layer portion of the semiconductor portion, the first semiconductor layer and the second semiconductor layer being of a second conductivity type; a gate electrode provided on the semiconductor portion; a first contact piercing the gate electrode, a lower portion of the first contact being disposed inside the first semiconductor layer, a lower end of the first contact being connected to the first semiconductor layer; a second contact piercing the gate electrode, a lower portion of the second contact being disposed inside the second semiconductor layer, a lower end of the second contact being connected to the second semiconductor layer; a first insulating film provided between the first semiconductor layer and a side surface of the first contact and between the first contact and the gate electrode; and a second insulating film provided between the second semiconductor layer and a side surface of the second contact and between the second contact and the gate electrode. The device according to claim 1 , further comprising: a third insulating film surrounding a first portion, a portion of the first semiconductor layer contacting the first portion, and a portion of the second semiconductor layer contacting the first portion, the first portion being of the semiconductor portion and being positioned between the first semiconductor layer and the second semiconductor layer; and an insulating member surrounding the gate electrode and piercing the third insulating film, the first semiconductor layer, and the second semiconductor layer. The device according to claim 2 , wherein the first insulating film, the second insulating film, and the insulating member are made from a first insulating material, and when viewed from above, a minimum width of the insulating member is narrower than a minimum width of a structure body made of the first contact and the first insulating film. The device according to claim 3 , further comprising an inter-layer insulating film provided around the first contact, the second contact, and the insulating member, the third insulating film and the inter-layer insulating film being made of a second insulating material different from the first insulating materia The device according to claim 2 , wherein the first insulating film and the second insulating film are formed as one body with the insulating member. The device according to claim 2 , wherein the first insulating film and the second insulating film are separated from the insulating member. The device according to claim 2 , further comprising a third contact, the gate electrode being subdivided into three portions by the first insulating film, the second insulating film, and the insulating member, the three portions being arranged along a direction, the direction being from the first semiconductor layer toward the second semiconductor layer, the third contact being connected to the portion disposed between the first insulating film and the second insulating film. The device according to claim 1 , further comprising a third insulating film surrounding a channel portion of the semiconductor portion, surrounding a portion of the first semiconductor layer contacting the channel portion, and surrounding a portion of the second semiconductor layer contacting the channel portion, the channel portion being positioned between the first semiconductor layer and the second semiconductor layer, when viewed from above, an inner edge of the third insulating film being disposed inside the gate electrode. The device according to claim 1 , wherein the gate electrode includes the same semiconductor material as a semiconductor material included in the semiconductor portion, and the gate electrode includes the same impurity as an impurity included in the semiconductor portion. |
| CPC Classification | Semiconductor Devices Not Covered By Class H10 |
| Extended Family | 012-557-685-820-718 154-922-030-719-880 125-393-004-953-11X 011-543-548-478-318 016-157-150-077-086 054-569-181-477-014 |
| Patent ID | 20190088753 |
| Inventor/Author | Nishigoori Masahito Kitahara Hiroyoshi Fukai Yasushi Terada Naozumi |
| IPC | H01L29/417 H01L29/423 H01L29/49 |
| Status | Active |
| Owner | Kabushiki Kaisha Toshiba Toshiba Electronic Devices & Storage Corporation |
| Simple Family | 012-557-685-820-718 154-922-030-719-880 125-393-004-953-11X 016-157-150-077-086 011-543-548-478-318 054-569-181-477-014 |
| CPC (with Group) | H10D64/251 H10D30/60 H01L21/76224 H10D64/256 H10D64/258 H10D64/519 H10D64/663 H10D30/027 H10D64/671 |
| Issuing Authority | United States Patent and Trademark Office (USPTO) |
| Kind | Patent Application Publication |